diff options
| author | Kapil Porwal <kapilporwal@google.com> | 2023-07-31 15:31:35 +0000 |
|---|---|---|
| committer | Jakub Czapiga <jacz@semihalf.com> | 2023-08-01 11:52:44 +0000 |
| commit | 340023fd28df1dab8287fd273ce770b75e122c3e (patch) | |
| tree | 7af6930d734c5a1d6c06750e89e9777631898e74 /src/mainboard/google | |
| parent | d88039cbfec7c46fd63d0f0bfe33ae2a231cb4a2 (diff) | |
mb/google/rex/var/screebo: Enable RTD3 for SSD
Currently, S0iX test is failing because S0i2 susbstate is blocked.
Enable RTD3 for SSD to unblock S0i2.2 substate residency.
BUG=none
TEST=Screebo can enter into S0iX.
S0iX substate residency w/o this CL -
```
Substate Residency
S0i2.0 0
S0i2.1 38451594
S0i2.2 0
```
S0iX substate residency w/ this CL -
```
Substate Residency
S0i2.0 0
S0i2.1 12108
S0i2.2 33878424
```
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I50ac730820b3f29c387dc73bd90f1392a8797e24
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76831
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/rex/variants/screebo/overridetree.cb | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/screebo/overridetree.cb b/src/mainboard/google/rex/variants/screebo/overridetree.cb index 4567d5dfc3..a7b7d54e25 100644 --- a/src/mainboard/google/rex/variants/screebo/overridetree.cb +++ b/src/mainboard/google/rex/variants/screebo/overridetree.cb @@ -231,6 +231,13 @@ chip soc/intel/meteorlake .clk_req = 4, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + chip soc/intel/common/block/pcie/rtd3 + register "is_storage" = "true" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A19)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A20)" + register "srcclk_pin" = "4" + device generic 0 on end + end end # PCIE4_P9 SSD card device ref pcie_rp10 on # Enable SD Card PCIE4 rp10 using clk 7 |