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authorFelix Held <felix-coreboot@felixheld.de>2022-05-06 17:46:06 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-16 15:21:19 +0000
commit2ec44ec95fece227b9dbd7bf70e03c2ddcb5e45a (patch)
tree5c671415f8cd07c81669b2b8d9d24b4cbf6b7685 /src/mainboard/google
parent452baa047a2df868d2d004ea1c938551571adc1f (diff)
soc/amd/cezanne/fsp_m_params: don't hard-code USB PHY config table size
Use sizeof instead of having a hard-coded struct length. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I85dc2fce11d9a670b2037d8a6a694177cfaa2177 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64125 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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