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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-04 13:05:01 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-11 07:12:15 +0200 |
commit | 1ae305efe1a0823c270767ddf6cc02c41ce146f8 (patch) | |
tree | 14d8f7bc15cb886186eb1e81bcd238ca2fac05ec /src/mainboard/google | |
parent | 42f4651434877085f2a44939375bffeeecdb2c37 (diff) |
CBMEM: Add cbmem_late_set_table() and drop references to high_tables_base
This helper function is for compatibility only for chipsets that do
not implement get_top_of_ram() to support early CBMEM.
Also remove references to globals high_tables_base and _size under
arch/ and from two ARMv7 boards.
Change-Id: I17eee30635a0368b2ada06e0698425c5ef0ecc53
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3902
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/pit/mainboard.c | 17 | ||||
-rw-r--r-- | src/mainboard/google/snow/mainboard.c | 17 |
2 files changed, 22 insertions, 12 deletions
diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c index 54ea042bd5..7dd8388596 100644 --- a/src/mainboard/google/pit/mainboard.c +++ b/src/mainboard/google/pit/mainboard.c @@ -221,17 +221,22 @@ static void mainboard_init(device_t dev) // gpio_info(); } +static void setup_cbmem(void) +{ + u64 size = CONFIG_COREBOOT_TABLES_SIZE; + u64 base = CONFIG_SYS_SDRAM_BASE + + ((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) - + CONFIG_COREBOOT_TABLES_SIZE; + cbmem_late_set_table(base, size); + cbmem_init(base, size); +} + static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init; /* set up coreboot tables */ - /* FIXME: this should happen somewhere else */ - high_tables_size = CONFIG_COREBOOT_TABLES_SIZE; - high_tables_base = CONFIG_SYS_SDRAM_BASE + - ((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) - - CONFIG_COREBOOT_TABLES_SIZE; - cbmem_init(high_tables_base, high_tables_size); + setup_cbmem(); /* set up dcache and MMU */ /* FIXME: this should happen via resource allocator */ diff --git a/src/mainboard/google/snow/mainboard.c b/src/mainboard/google/snow/mainboard.c index 5aedac9646..8805be5fb7 100644 --- a/src/mainboard/google/snow/mainboard.c +++ b/src/mainboard/google/snow/mainboard.c @@ -262,17 +262,22 @@ static void mainboard_init(device_t dev) // gpio_info(); } +static void setup_cbmem(void) +{ + u64 size = CONFIG_COREBOOT_TABLES_SIZE; + u64 base = CONFIG_SYS_SDRAM_BASE + + ((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) - + CONFIG_COREBOOT_TABLES_SIZE; + cbmem_late_set_table(base, size); + cbmem_init(base, size); +} + static void mainboard_enable(device_t dev) { dev->ops->init = &mainboard_init; /* set up coreboot tables */ - /* FIXME: this should happen somewhere else */ - high_tables_size = CONFIG_COREBOOT_TABLES_SIZE; - high_tables_base = CONFIG_SYS_SDRAM_BASE + - ((unsigned)CONFIG_DRAM_SIZE_MB << 20ULL) - - CONFIG_COREBOOT_TABLES_SIZE; - cbmem_init(high_tables_base, high_tables_size); + setup_cbmem(); /* set up dcache and MMU */ /* FIXME: this should happen via resource allocator */ |