mb/google/brya: Support power sequencing for USB-only WWAN

Nissa is using the FM101 which is USB only. To allow us to reuse the
existing wwan_power.asl for power sequencing, move the PCIe-specific
part behind a new Kconfig HAVE_PCIE_WWAN.

BUG=b:217092522
TEST=Build brya0 and check that generated dsdt.asl doesn't change.

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Icb6db91ce00deb2b30379f5ff7a974d1feb62ea8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61693
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

3 files changed, 15 insertions, 1 deletions

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 86c546d95b..001332d3a9 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -205,7 +205,11 @@ config HAVE_WWAN_POWER_SEQUENCE
 	  Select this if the variant has a WWAN module and requires the poweroff sequence
 	  to be performed on shutdown. Must define WWAN_FCPO, WWAN_RST and WWAN_PERST GPIOs
 	  in variant.h, as well as T1_OFF_MS (time between PERST & RST) and T2_OFF_MS (time
-	  between RST and FCPO).
+	  between RST and FCPO). WWAN_PERST and T1_OFF_MS are only necessary for PCIe WWAN
+	  (when HAVE_PCIE_WWAN is also selected).
+
+config HAVE_PCIE_WWAN
+	def_bool n
 
 config USE_PM_ACPI_TIMER
 	default n
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name
index d33d68d728..9ff6d4f0bc 100644
--- a/src/mainboard/google/brya/Kconfig.name
+++ b/src/mainboard/google/brya/Kconfig.name
@@ -13,6 +13,7 @@ config BOARD_GOOGLE_ANAHERA
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9763E
 	select DRIVERS_GFX_GENERIC
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 
 config BOARD_GOOGLE_ANAHERA4ES
@@ -20,6 +21,7 @@ config BOARD_GOOGLE_ANAHERA4ES
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9763E
 	select DRIVERS_GFX_GENERIC
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 
 config BOARD_GOOGLE_BRASK
@@ -33,6 +35,7 @@ config BOARD_GOOGLE_BRYA0
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9755
 	select DRIVERS_INTEL_MIPI_CAMERA
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 	select SOC_INTEL_COMMON_BLOCK_IPU
 	select SOC_INTEL_CRASHLOG
@@ -42,6 +45,7 @@ config BOARD_GOOGLE_BRYA4ES
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9755
 	select DRIVERS_INTEL_MIPI_CAMERA
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 	select SOC_INTEL_COMMON_BLOCK_IPU
 	select SOC_INTEL_CRASHLOG
@@ -90,12 +94,14 @@ config BOARD_GOOGLE_PRIMUS
 	bool "->  Primus"
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9755
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 
 config BOARD_GOOGLE_PRIMUS4ES
 	bool "->  Primus4ES"
 	select BOARD_GOOGLE_BASEBOARD_BRYA
 	select DRIVERS_GENESYSLOGIC_GL9755
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 
 config BOARD_GOOGLE_REDRIX
@@ -108,6 +114,7 @@ config BOARD_GOOGLE_REDRIX
 	select DRIVERS_I2C_MAX98390
 	select DRIVERS_INTEL_MIPI_CAMERA
 	select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 	select SOC_INTEL_COMMON_BLOCK_IPU
 
@@ -121,6 +128,7 @@ config BOARD_GOOGLE_REDRIX4ES
 	select DRIVERS_I2C_MAX98390
 	select DRIVERS_INTEL_MIPI_CAMERA
 	select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG
+	select HAVE_PCIE_WWAN
 	select HAVE_WWAN_POWER_SEQUENCE
 	select SOC_INTEL_COMMON_BLOCK_IPU
 
diff --git a/src/mainboard/google/brya/wwan_power.asl b/src/mainboard/google/brya/wwan_power.asl
index d9bb5e7944..f19a5ef4e9 100644
--- a/src/mainboard/google/brya/wwan_power.asl
+++ b/src/mainboard/google/brya/wwan_power.asl
@@ -4,8 +4,10 @@
 
 Method (MPTS, 1)
 {
+#if CONFIG(HAVE_PCIE_WWAN)
 	\_SB.PCI0.CTXS(WWAN_PERST);
 	Sleep(T1_OFF_MS)
+#endif
 	\_SB.PCI0.CTXS(WWAN_RST);
 	Sleep(T2_OFF_MS)
 	\_SB.PCI0.CTXS(WWAN_FCPO);