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authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-06-17 10:50:47 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-07-07 13:47:48 +0000
commit0e582862c84751c1a517a294091c1eb1ae395543 (patch)
treefb10cfa07b980543fcc041b0037eb45036eb66b8 /src/mainboard/google
parenteabd97020e19543ad4f60e2fb3bcff64ab25be0f (diff)
mb/google/brya/var/agah: Remove variant_fill_ssdt()
Since the GPU will be left powered on, the kernel has the opportunity to save context and this method to save the BARs is not required. BUG=b:233959099, b:236289930 TEST=build Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I19cf12426361a53e3672c1e05aa6d68d5dd6627c Reviewed-on: https://review.coreboot.org/c/coreboot/+/65208 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Robert Zieba <robertzieba@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/agah/variant.c61
1 files changed, 0 insertions, 61 deletions
diff --git a/src/mainboard/google/brya/variants/agah/variant.c b/src/mainboard/google/brya/variants/agah/variant.c
index 73fe75bc20..737cdd241b 100644
--- a/src/mainboard/google/brya/variants/agah/variant.c
+++ b/src/mainboard/google/brya/variants/agah/variant.c
@@ -137,64 +137,3 @@ void variant_init(void)
dgpu_power_sequence_on();
}
-
-/* Save PCI BARs to the ACPI copy of the "saved PCI config space" */
-void variant_fill_ssdt(const struct device *unused)
-{
- if (!gpu_powered_on)
- return;
-
- const struct device *dgpu = DEV_PTR(dgpu);
- acpigen_write_scope("\\_SB.PCI0.PEG0.PEGP");
- acpigen_write_method("_INI", 0);
- {
- /* Local0 = VGAR */
- acpigen_write_store();
- acpigen_emit_namestring("VGAR");
- acpigen_emit_byte(LOCAL0_OP);
-
- /*
- * CreateDWordField(Local0, 11, BAR0)
- * BAR0 = bases[0]
- * CreateDWordField(Local0, 15, BAR1)
- * BAR1 = bases[1]
- * ...
- */
- unsigned int idx, i = 0;
- for (idx = PCI_BASE_ADDRESS_0; idx <= PCI_BASE_ADDRESS_5; idx += 4, ++i) {
- char name[ACPI_NAME_BUFFER_SIZE];
- const struct resource *res;
-
- res = probe_resource(dgpu, idx);
- if (!res || !(res->flags & IORESOURCE_STORED))
- continue;
-
- snprintf(name, sizeof(name), "BAR%1d", i);
- acpigen_write_create_dword_field(LOCAL0_OP, idx - VGAR_BYTE_OFFSET,
- name);
- acpigen_write_store_int_to_namestr(res->base & 0xffffffff, name);
- printk(BIOS_INFO, "GPU: saving %s as 0x%x\n", name,
- (uint32_t)(res->base & 0xffffffff));
-
- /* Also save the upper 32 bits of the BAR if applicable */
- if (!(res->flags & IORESOURCE_PCI64))
- continue;
-
- idx += sizeof(uint32_t);
- i++;
- snprintf(name, sizeof(name), "BAR%1d", i);
- acpigen_write_create_dword_field(LOCAL0_OP, idx - VGAR_BYTE_OFFSET,
- name);
- acpigen_write_store_int_to_namestr((res->base >> 32) & 0xffffffff,
- name);
- printk(BIOS_INFO, "GPU: saving %s as 0x%x\n", name,
- (uint32_t)((res->base >> 32) & 0xffffffff));
- }
-
- /* VGAR = Local0 */
- acpigen_write_store_op_to_namestr(LOCAL0_OP, "VGAR");
- }
-
- acpigen_write_method_end();
- acpigen_write_scope_end();
-}