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authorSubrata Banik <subratabanik@google.com>2022-01-11 09:51:52 +0000
committerSubrata Banik <subratabanik@google.com>2022-01-13 20:19:37 +0000
commit0c1c2decde678903f1387ad3056ee8e3c4d24a22 (patch)
treeda41902e7bd5b44bcdac5a6951b5d515adca59d4 /src/mainboard/google
parentd8bcad594fc142e2ba374e04e311653bd664a803 (diff)
Documentation: Capture anomalies between pad and lock reset type
This patch documents the recommendation as per Intel GPIO BWG on GPIO PAD lock configuration. As per GPIO BWG, it's recommended to change the Pad Reset Config for lock GPP as `Power Good` so that pad configuration and lock bit can be reset at the same time. Refer to Intel doc:630603 for details. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3faf5dfc28c8c2dbc322db80a59f44a29002673c Reviewed-on: https://review.coreboot.org/c/coreboot/+/61000 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
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