summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorSubrata Banik <subratabanik@google.com>2022-02-16 15:42:24 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-02-18 14:52:58 +0000
commit0724ab1335e28b8338777f7c81fba4c7a26926f7 (patch)
tree4340e85c44a03000f15ae6849068c019200c697d /src/mainboard/google
parent782d0125905da839bf8812cb5763201b66401bf8 (diff)
mb/google/brya/var/taeko4es: Fix PLD group order
In ec/google/chromeec: Add PLD to EC conn in ACPI table (667471b8d807da5a5a9277db47e069ad3b1351c7), PLD is added to ACPI table. This patch ensures USB _PLD group numbers are appear in order. BUG=b:216490477 TEST=build coreboot and system boot into OS. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ic3fbf307bfa42bd377c8f23c1837a6d15cb378e7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62032 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/taeko4es/overridetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
index 569f223995..b0a5de6517 100644
--- a/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/taeko4es/overridetree.cb
@@ -510,7 +510,7 @@ chip soc/intel/alderlake
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(4, 1)}"
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb2_port9 on end
end
chip drivers/usb/acpi
@@ -529,7 +529,7 @@ chip soc/intel/alderlake
.panel = PLD_PANEL_LEFT,
.horizontal_position = PLD_HORIZONTAL_POSITION_LEFT,
.shape = PLD_SHAPE_HORIZONTAL_RECTANGLE,
- .group = ACPI_PLD_GROUP(4, 1)}"
+ .group = ACPI_PLD_GROUP(3, 1)}"
device ref usb3_port1 on end
end
end