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authorWeiyi Lu <weiyi.lu@mediatek.com>2020-05-13 10:01:14 +0800
committerHung-Te Lin <hungte@chromium.org>2020-08-12 02:51:39 +0000
commita4cad368a2996645d2ffc71425f49b246b0340ad (patch)
treeb8cc9dd452fcdb4235d6bbaf49a12977f633aa7b /src/mainboard/google/zork
parent8fcc246a565b0d687c2891396719e677fe9bdf23 (diff)
soc/mediatek/mt8192: Add PLL and clock init support
Add PLL and clock init code. TEST=Boots correctly on MT8192EVB. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Change-Id: Ia49342c058577e8e107b7e56c867bf21532e40d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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