diff options
| author | Kane Chen <kane_chen@pegatron.corp-partner.google.com> | 2021-01-20 18:41:54 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-10 16:03:08 +0000 |
| commit | c023839a8406950082b7e666fd74e5a3f4bd3991 (patch) | |
| tree | 7b7537b673d7f426ac981466efb2413761c183c7 /src/mainboard/google/zork/variants | |
| parent | 35b3cc9b6d550184f32e903a43e102c81a883f3d (diff) | |
mb/google/zork/var/shuboz: Modify touchpad setting for Jelboz
Since Jelboz support number pad,
due to one single coreboot for both Jelboz and Shuboz,
modify "overridetree.cb" setting to number pad support for Jelboz.
BUG=b:174964012
BRANCH=master
TEST=emerge-zork coreboot chromeos-bootimage
Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com>
Change-Id: Ie0219419834b34b6eac589f28d3604f5f1b65679
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/mainboard/google/zork/variants')
| -rw-r--r-- | src/mainboard/google/zork/variants/shuboz/overridetree.cb | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/mainboard/google/zork/variants/shuboz/overridetree.cb b/src/mainboard/google/zork/variants/shuboz/overridetree.cb index 7160899267..65d3692fbb 100644 --- a/src/mainboard/google/zork/variants/shuboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/shuboz/overridetree.cb @@ -58,13 +58,14 @@ chip soc/amd/picasso register "has_power_resource" = "1" device i2c 10 on end end - chip drivers/i2c/generic - register "hid" = ""ELAN0000"" - register "desc" = ""ELAN Touchpad"" - register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_9)" - register "wake" = "GEVENT_22" - register "probed" = "1" - device i2c 15 on end + chip drivers/i2c/hid + register "generic.hid" = ""ELAN2702"" + register "generic.desc" = ""ELAN Touchpad"" + register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_9)" + register "generic.wake" = "GEVENT_22" + register "generic.probed" = "1" + register "hid_desc_reg_offset" = "0x01" + device i2c 15 on end end end # device end # chip soc/amd/picasso |