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authorFurquan Shaikh <furquan@google.com>2020-08-04 20:16:55 -0700
committerFurquan Shaikh <furquan@google.com>2020-08-06 19:09:03 +0000
commitcc6c41f8d8b6880a7ad4947599350758cd18f85f (patch)
treed47ce96bb7a3c021e11d59b55078859475d293a4 /src/mainboard/google/zork/variants/dalboz/gpio.c
parent55fefbe39d9637e93031efe7b59746df8ebf733a (diff)
mb/google/zork: Switch USI_RESET to active low polarity for v3.6+
v3.6 of reference schematics have switched the polarity of reset signal to touchscreen controller from active high to active low. This change updates the default configuration in baseboard gpio tables to set the reset GPIO to output low and override tables in variants to set the reset GPIO to output high. Additionally, devicetree by default exposes ACTIVE_LOW configuration for reset GPIO. In order to support pre-v3.6 boards, reset GPIO is updated to ACTIVE_HIGH based on board version. BUG=b:161937506 Change-Id: I092f274d8eb1920a1cd6d3eccbe8f26b0b28928a Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44192 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/dalboz/gpio.c')
-rw-r--r--src/mainboard/google/zork/variants/dalboz/gpio.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c
index 73c0042f0b..7b13d839da 100644
--- a/src/mainboard/google/zork/variants/dalboz/gpio.c
+++ b/src/mainboard/google/zork/variants/dalboz/gpio.c
@@ -15,6 +15,8 @@ static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = {
PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE),
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
+ /* USI_RESET */
+ PAD_GPO(GPIO_140, HIGH),
/* Unused */
PAD_NC(GPIO_143),
};
@@ -24,6 +26,8 @@ static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = {
PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC
/* EN_PWR_TOUCHPAD_PS2 */
PAD_GPO(GPIO_67, HIGH),
+ /* USI_RESET */
+ PAD_GPO(GPIO_140, HIGH),
};
const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)