diff options
author | Furquan Shaikh <furquan@google.com> | 2020-06-18 01:34:48 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-06-25 08:08:05 +0000 |
commit | da459c46bdbb3bb50ef0680d069bf5e47a7d5fad (patch) | |
tree | 3848c96fdceb44edf03c2ad02b730f82fcef878b /src/mainboard/google/zork/variants/baseboard | |
parent | c699255ba50ffa3e79dbacb572901e07034662be (diff) |
mb/google/zork: Update ramstage GPIOs for v3 schematics for trembyle reference
This change updates the baseboard GPIO table in ramstage to match v3
version of trembyle reference schematics. All variants using this
reference are accordingly updated to configure the GPIOs that changed
as part of v3 schematics.
BUG=b:157088093, b:154676993, b:157098434
TEST=Compiles
Signed-off-by: Martin Roth <martinroth@chromium.org>
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ib1d6ee2e995c1fca229c20ea63da9a45fb89f64a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/+/2251393
Reviewed-by: Aaron Durbin <adurbin@google.com>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42724
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard')
-rw-r--r-- | src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index fad8a53d3e..d3f7ae3454 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -115,8 +115,8 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPO(GPIO_11, HIGH), /* USI_INT_ODL */ PAD_GPI(GPIO_12, PULL_UP), - /* DMIC_SEL */ - PAD_GPO(GPIO_13, LOW), // Select Camera 1 Dmic + /* EN_PWR_TOUCHPAD_PS2 */ + PAD_GPO(GPIO_13, HIGH), /* BT_DISABLE */ PAD_GPO(GPIO_14, LOW), /* USB_OC0_L - USB C0 + USB A0 */ @@ -135,12 +135,12 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPI(GPIO_31, PULL_UP), /* EN_PWR_FP */ PAD_GPO(GPIO_32, HIGH), - /* EN_PWR_TOUCHPAD_PS2 */ + /* DMIC SEL */ /* - * EN_PWR_TOUCHPAD_PS2 - Make sure Ext ROM Sharing is disabled before - * using this GPIO. Otherwise SPI flash access will be very slow. + * Make sure Ext ROM Sharing is disabled before using this GPIO. Otherwise SPI flash + * access will be very slow. */ - PAD_GPO(GPIO_67, HIGH), + PAD_GPO(GPIO_67, LOW), // Select Camera 1 Dmic /* EMMC_RESET */ PAD_GPO(GPIO_68, LOW), /* FPMCU_BOOT0 - TODO: Check this */ @@ -155,16 +155,14 @@ static const struct soc_amd_gpio gpio_set_stage_ram[] = { PAD_GPO(GPIO_76, HIGH), /* APU_EDP_BL_DISABLE TODP: Set low in depthcharge */ PAD_GPO(GPIO_85, HIGH), - /* MST_GPIO_2 (Fw Update HDMI hub) */ - PAD_GPI(GPIO_86, PULL_NONE), /* EMMC_DATA7 */ PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE), /* EMMC_DATA5 */ PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE), /* EN_DEV_BEEP_L */ PAD_GPO(GPIO_89, HIGH), - /* MST_GPIO_3 (Fw Update HDMI hub) */ - PAD_GPI(GPIO_90, PULL_NONE), + /* Testpoint */ + PAD_GPI(GPIO_90, PULL_UP), /* EN_SPKR TODO: Verify driver enables this (add to ACPI) */ PAD_GPO(GPIO_91, LOW), /* EMMC_DATA0 */ |