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authorRaul E Rangel <rrangel@chromium.org>2020-09-03 14:30:33 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-09-14 07:09:23 +0000
commit7c79d8302b7361a11a204131d5661d768feb82ac (patch)
tree8d233bf36810d7ea8af038e3b8317bb7dbff6e3e /src/mainboard/google/zork/variants/baseboard
parent73cd3e704fde61e287f6fbdd6d371ed19e41f15d (diff)
soc/amd/picasso: Move sd_emmc_config into emmc_config struct
I plan on adding another eMMC parameter. This refactor keeps the config contained in a single struct. BUG=b:159823235 TEST=Build test Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I4b57d651ab44d6c1cad661d620bffd4207dfebd4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45095 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/google/zork/variants/baseboard')
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb4
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb4
2 files changed, 6 insertions, 2 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index a0f6636b7f..40042436d3 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -40,7 +40,9 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
- register "sd_emmc_config" = "SD_EMMC_EMMC_HS400"
+ register "emmc_config" = "{
+ .timing = SD_EMMC_EMMC_HS400,
+ }"
register "xhci0_force_gen1" = "0"
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index 169451931d..8d475e956e 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -40,7 +40,9 @@ chip soc/amd/picasso
# End : OPN Performance Configuration
- register "sd_emmc_config" = "SD_EMMC_EMMC_HS400"
+ register "emmc_config" = "{
+ .timing = SD_EMMC_EMMC_HS400,
+ }"
register "xhci0_force_gen1" = "0"