diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-08-09 10:39:27 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-28 17:42:22 +0000 |
| commit | dd6c7331ac6692816484438f2f2950060c6e55c9 (patch) | |
| tree | 58e20ae0ebb11346566d2630c5c6c727340ba66f /src/mainboard/google/zork/Kconfig | |
| parent | f032221bd1486c6c04bb19ad202bb5c6b525f8b0 (diff) | |
mb/(amd,google): Update SPI Kconfig settings based on devicetree
This takes the devicetree SPI settings and moves them into Kconfig.
BUG=b:195943311
TEST=boot guybrush & majolica and verify spi settings.
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Icce1d57761465ae8255e5d9ce8679f3fdcb0ceed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56885
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/zork/Kconfig')
| -rw-r--r-- | src/mainboard/google/zork/Kconfig | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig index e93516e07e..c9db2f4892 100644 --- a/src/mainboard/google/zork/Kconfig +++ b/src/mainboard/google/zork/Kconfig @@ -245,20 +245,27 @@ config VARIANT_MAX_BOARD_ID_BROKEN_FMPCU_POWER help Last board version that needs the extra delay for FPMCU init. +if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE - int - default 0 if EM100 # Normal read mode - default 2 # Dual IO (1-1-2) + default 4 # Dual IO (1-2-2) config EFS_SPI_SPEED - int - default 3 if EM100 # 16.66 MHz - default 0 # 66.66 MHz + default 0 # 66MHz config EFS_SPI_MICRON_FLAG - int default 0 +config NORMAL_READ_SPI_SPEED + default 1 # 33MHz + +config ALT_SPI_SPEED + default 0 # 66MHz + +config TPM_SPI_SPEED + default 0 # 66MHz + +endif # !EM100 + config CHROMEOS_WIFI_SAR bool default y if CHROMEOS |