google/zoombini: Add new board

Add zoombini board files using cannonlake and FSP 2.0.
Copied most initial files from poppy and cannonlake_rvp.

BUG=b:64395641
BRANCH=None
TEST=Compiles successfully using "./util/abuild/abuild
-p none -t google/zoombini -x -a"

Change-Id: I13ebaae403d08f1b2e6881eeba4dc1787c792b4e
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/21273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 37 insertions, 0 deletions

diff --git a/src/mainboard/google/zoombini/dsdt.asl b/src/mainboard/google/zoombini/dsdt.asl
new file mode 100644
index 0000000000..b1faad6ecc
--- /dev/null
+++ b/src/mainboard/google/zoombini/dsdt.asl
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2007-2009 coresystems GmbH
+ * Copyright 2017 Google Inc.
+ * Copyright (C) 2017 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+DefinitionBlock(
+	"dsdt.aml",
+	"DSDT",
+	0x05,		// DSDT revision: ACPI v5.0
+	"COREv4",	// OEM id
+	"COREBOOT",	// OEM table id
+	0x20110725	// OEM revision
+)
+{
+	// global NVS and variables
+	#include <soc/intel/cannonlake/acpi/globalnvs.asl>
+
+	Scope (\_SB) {
+	}
+
+	#if IS_ENABLED(CONFIG_CHROMEOS)
+	// Chrome OS specific
+	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
+	#endif
+}