diff options
| author | Duncan Laurie <dlaurie@google.com> | 2020-11-30 10:09:42 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2020-12-02 16:31:33 +0000 |
| commit | 912d9ec158261d9fe2362b99a406ea2878c6b411 (patch) | |
| tree | 14c8b1370d029b5265b2a1c061e9778699f5358d /src/mainboard/google/volteer/variants | |
| parent | 3cc3d818e8c52a528252ed961d24fe280d5828ab (diff) | |
mb/google/volteer: Add additional SD cards to device list
The initial commit only focused on GL9755S and RTS5261, but there
were recently other cards added to the fw_config and those also
need to be added to the probe lists.
BUG=b:173207454
TEST=abuild google/volteer
Change-Id: Ic27074a016ffbd4c4dd86104a6d85437357c4b82
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants')
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index bc1febb18f..455b9abed3 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -39,7 +39,7 @@ fw_config option SD_GL9755S 1 option SD_RTS5261 2 option SD_RTS5227S 3 - option SD_L9750 4 + option SD_GL9750 4 option SD_OZ711LV2LN 5 end field KB_LAYOUT 20 21 @@ -459,12 +459,18 @@ chip soc/intel/tigerlake device ref pcie_rp8 on probe DB_SD SD_GL9755S probe DB_SD SD_RTS5261 + probe DB_SD SD_RTS5227S + probe DB_SD SD_GL9750 + probe DB_SD SD_OZ711LV2LN chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H3)" register "srcclk_pin" = "3" device generic 0 on probe DB_SD SD_GL9755S + probe DB_SD SD_RTS5227S + probe DB_SD SD_GL9750 + probe DB_SD SD_OZ711LV2LN end end chip soc/intel/common/block/pcie/rtd3 |