mb/google/volteer: ACPI nodes for volteer2_ti50

Unique among the Volteer devices, the volteer2_ti50 variant connects to
the TPM via I2C.  This CL introduces the proper devicestree declarations
for the Linux kernel to recognize that.

overridetree.cb is shared between "sub"-variants volteer2 and
volteer2_ti50, so both will have two TPM nodes, the I2C being disabled
by default.  The odd _ti50 variant then has code in variant.c to enable
the I2C node and disable the SPI node.

BUG=b:173461736
TEST=abuild -t GOOGLE_VOLTEER2{_TI50,} -c max -x

Change-Id: I5576a595bbabc34c62b768f8b3439e35ff6bcf7b
Signed-off-by: Jes Bodi Klinke <jbk@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48223
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 42 insertions, 0 deletions

diff --git a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
index 84081983c3..4d5dc87cb9 100644
--- a/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/volteer/variants/baseboard/include/baseboard/variants.h
@@ -21,4 +21,7 @@ const struct cros_gpio *variant_cros_gpios(size_t *num);
 const struct ddr_memory_cfg *variant_memory_params(void);
 int variant_memory_sku(void);
 
+/* Modify devictree settings during ramstage. */
+void variant_devtree_update(void);
+
 #endif /* __BASEBOARD_VARIANTS_H__ */
diff --git a/src/mainboard/google/volteer/variants/volteer2/Makefile.inc b/src/mainboard/google/volteer/variants/volteer2/Makefile.inc
index 13269db5ec..04af3aec1a 100644
--- a/src/mainboard/google/volteer/variants/volteer2/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/volteer2/Makefile.inc
@@ -3,3 +3,4 @@
 bootblock-y += gpio.c
 
 ramstage-y += gpio.c
+ramstage-y += variant.c
diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
index a1012a665a..916777c0a3 100644
--- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
@@ -201,6 +201,11 @@ chip soc/intel/tigerlake
 				register "key.label" = ""pen_eject""
 				device generic 0 on end
 			end
+			chip drivers/i2c/tpm
+				register "hid" = ""GOOG0005""
+				register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C21_IRQ)"
+				device i2c 50 off end
+			end
 		end
 		device ref i2c2 on
 			chip drivers/i2c/sx9310
diff --git a/src/mainboard/google/volteer/variants/volteer2/variant.c b/src/mainboard/google/volteer/variants/volteer2/variant.c
new file mode 100644
index 0000000000..057bb8ad65
--- /dev/null
+++ b/src/mainboard/google/volteer/variants/volteer2/variant.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <baseboard/variants.h>
+#include <soc/pci_devs.h>
+#include <acpi/acpi_device.h>
+
+extern struct chip_operations drivers_i2c_tpm_ops;
+
+static bool match_i2c_tpm(DEVTREE_CONST struct device *dev)
+{
+	return dev->chip_ops == &drivers_i2c_tpm_ops;
+}
+
+/*
+ * This function runs only on the volteer_ti50 variant, which has the GSC on a
+ * reworked I2C bus.
+ */
+static void devtree_enable_i2c_tpm(void)
+{
+	struct device *spi_tpm = pcidev_path_on_root(PCH_DEVFN_GSPI0)->link_list->children;
+	struct device *i2c_tpm = dev_find_matching_device_on_bus(
+		pcidev_path_on_root(PCH_DEVFN_I2C1)->link_list, match_i2c_tpm);
+	if (!i2c_tpm || !spi_tpm)
+		return;
+	spi_tpm->enabled = 0;
+	i2c_tpm->enabled = 1;
+}
+
+void variant_devtree_update(void)
+{
+	if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50))
+		devtree_enable_i2c_tpm();
+}