diff options
| author | Furquan Shaikh <furquan@google.com> | 2021-08-24 00:38:39 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-01 19:19:42 +0000 |
| commit | ae20d4c78f9fbb5fe9f8c1ef026e159961968f73 (patch) | |
| tree | 591d2aad48298063ba6ce4d6b0fc0d56450a2901 /src/mainboard/google/volteer/variants/voxel | |
| parent | 9c348a7b7ea3422a74af9b820275751e9abb4a12 (diff) | |
mb/google/volteer: Fix USB4 enabling for volteer family
volteer baseboard was currently enabling TBT(USB4) devices in
baseboard devicetree and also selecting the Kconfigs required for
resource allocation above 4G for the USB4 controllers. However, not
all volteer devices have USB4 support. This change fixes USB4 enabling
for volteer family by making the following udpates:
1. TBT devices are moved from baseboard devicetree to individual
override trees for the variants that actually support USB4.
2. When moving TBT devices to override tree, tbt_pcie_rp0 is marked as
on instead of hidden for all variants other than volteer
reference. This is because volteer reference is the only device that
has an asymmetric support for USB4 (i.e. does not support USB4 on C0
port).
3. Kconfig selection for PCIEXP_HOTPLUG is moved to Kconfig.name for
these variants.
Change-Id: If380dcb1ea1633b3a1d6932e769cb6ed0a2761c7
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57112
Reviewed-by: Weimin Wu <wuweimin@huaqin.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/voxel')
| -rw-r--r-- | src/mainboard/google/volteer/variants/voxel/overridetree.cb | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/src/mainboard/google/volteer/variants/voxel/overridetree.cb b/src/mainboard/google/volteer/variants/voxel/overridetree.cb index 7eabfa4d4a..69d1206fda 100644 --- a/src/mainboard/google/volteer/variants/voxel/overridetree.cb +++ b/src/mainboard/google/volteer/variants/voxel/overridetree.cb @@ -69,6 +69,26 @@ chip soc/intel/tigerlake device generic 0 on end end end + + device ref tbt_pcie_rp0 on + probe DB_USB USB4_GEN3 + end + device ref tbt_pcie_rp1 on + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + end + device ref tbt_dma0 on + probe DB_USB USB4_GEN2 + probe DB_USB USB4_GEN3 + chip drivers/intel/usb4/retimer + register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)" + register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)" + use tcss_usb3_port3 as dfp[0].typec_port + use tcss_usb3_port2 as dfp[1].typec_port + device generic 0 on end + end + end + device ref i2c0 on chip drivers/i2c/generic register "hid" = ""10EC5682"" @@ -211,22 +231,6 @@ chip soc/intel/tigerlake device generic 0 on end end end - # This variant has USB4/PCIe on both ports so RP0 must be enabled - # in order for hotplug resources to be assigned to Type-C Port C0. - device ref tbt_pcie_rp0 on - probe DB_USB USB4_GEN3 - end - device ref tbt_dma0 on - probe DB_USB USB4_GEN2 - probe DB_USB USB4_GEN3 - chip drivers/intel/usb4/retimer - register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)" - register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H10)" - use tcss_usb3_port3 as dfp[0].typec_port - use tcss_usb3_port2 as dfp[1].typec_port - device generic 0 on end - end - end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. |