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authorCaveh Jalali <caveh@chromium.org>2020-08-01 16:29:27 -0700
committerNick Vaccaro <nvaccaro@google.com>2020-08-10 21:49:44 +0000
commit173493784dd07ac1cbf055a0b26c55f9bd1f5a28 (patch)
tree1af93fdf08c8f0a8dea3a48f6a909a5785da5345 /src/mainboard/google/volteer/variants/volteer2
parent0c1879ff38a7cece04400221bd02534ce245a0c4 (diff)
mb/google/volteer: Pull up GPP_D16 instead of driving it
The latest realtek RTS5261 SD daughterboard exposes the PRSNT# pin to GPP_D16 but there is a RTS5261 requirement to pull up this pin and not drive it at power on. We can meet this requirement without breaking other boards by changing GPP_D16 to be a no-connect with an internal pull up. Other boards use this signal as an enable input, so changing this to pull up is OK. BUG=b:162722965 TEST=Verified RTS5261 and GL9755 daughterboards enumerate on PCI and can read SD cards. Change-Id: I096d76ec12b7c3afaf02e621fd301b6704913d5d Signed-off-by: Caveh Jalali <caveh@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/volteer2')
-rw-r--r--src/mainboard/google/volteer/variants/volteer2/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/volteer2/gpio.c b/src/mainboard/google/volteer/variants/volteer2/gpio.c
index 2b99e52029..96d940ab3f 100644
--- a/src/mainboard/google/volteer/variants/volteer2/gpio.c
+++ b/src/mainboard/google/volteer/variants/volteer2/gpio.c
@@ -91,7 +91,7 @@ static const struct pad_config override_gpio_table[] = {
/* D14 : ISH_UART0_TXD ==> UART_ISH_TX_DEBUG_RX */
PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1),
/* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */
- PAD_CFG_GPO(GPP_D16, 1, DEEP),
+ PAD_NC(GPP_D16, UP_20K),
/* D17 : ISH_GP4 ==> EN_FCAM_PWR */
PAD_CFG_GPO(GPP_D17, 1, DEEP),
/* D18 : ISH_GP5 ==> FCAM_SNRPWR_EN */