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author | Bora Guvendik <bora.guvendik@intel.com> | 2022-06-08 15:55:52 -0700 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-10 17:59:31 +0000 |
commit | 2c805b9afa7abdf630693bbf464fa2d58f89bf1e (patch) | |
tree | 73253d96a3bec9830ebebe77b35f55d248d8684d /src/mainboard/google/volteer/variants/voema | |
parent | d40e8b6cb542c652dc5e5a69c4b7e8075ec90d49 (diff) |
soc/intel/alderlake: Add Kconfig for Raptor Lake
Until FSP for RPL and ADL align, mainboards using RPL should select
SOC_INTEL_RAPTORLAKE and SOC_INTEL_ALDERLAKE_PCH_* together.
Currently, ADL FSP headers and RPL FSP headers differ. Use RPL FSP
header with Raptor Lake silicon. This code can be removed once ADL
and RPL start using the same FSP.
BUG=b:229134437
BRANCH=firmware-brya-14505.B
TEST=build adlrvp_rpl_ext_ec
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Iaf95352b9cafb81f23522bcf63753d199c0420eb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google/volteer/variants/voema')
0 files changed, 0 insertions, 0 deletions