diff options
| author | Duncan Laurie <dlaurie@google.com> | 2020-10-10 00:50:32 +0000 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2020-11-20 00:25:05 +0000 |
| commit | e1490e55edfed6acfc3e06e5117cabccd2704a11 (patch) | |
| tree | 1b5161f0f07da1ad53e8d9dd4a02635cddd826ce /src/mainboard/google/volteer/variants/terrador/overridetree.cb | |
| parent | e997d85e3be50cda1ffdcf4d76014b713fe4951b (diff) | |
mb/google/volteer/variants: Enable RTD3 for the NVMe device
Enable Runtime D3 for the volteer variants that have GPIO power control
of the NVMe device attached to PCIe Root Port 9.
Enable the GPIO for power control for variants that do not already have
it configured to allow the power to be disabled in D3 state.
BUG=b:160996445
TEST=tested on delbin
Change-Id: I6ebf813c6c3364fec2e489a9742f04452be92c45
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46262
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/terrador/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/volteer/variants/terrador/overridetree.cb | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/terrador/overridetree.cb b/src/mainboard/google/volteer/variants/terrador/overridetree.cb index caedfdad04..87959b8798 100644 --- a/src/mainboard/google/volteer/variants/terrador/overridetree.cb +++ b/src/mainboard/google/volteer/variants/terrador/overridetree.cb @@ -179,6 +179,14 @@ chip soc/intel/tigerlake device pnp 0c09.0 on end end end + device ref pcie_rp9 on + chip soc/intel/common/block/pcie/rtd3 + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B2)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A11)" + register "srcclk_pin" = "0" + device generic 0 on end + end + end device ref pmc hidden # The pmc_mux chip driver is a placeholder for the # PMC.MUX device in the ACPI hierarchy. |