soc/intel/common/tcss: Move AUX bias ctrl reg defines to SOC hdr

These field defines are SOC-specific. The AUX bias virtual wire field
positons are shifted in PTL.

In MTL SOC and older:
7:0    GROUP_ID   Group ID in PCH GPIO
10:8   BIT_NUM    Data bit Position in PCH GPIO
23:16  VW_INDEX   VW Index in PCH GPIO

In PTL SOC:
15:0    GROUP_ID   Group ID in PCH GPIO; targeted SB_PORTID
18:16   BIT_NUM    Data bit Position in PCH GPIO
31:24   VW_INDEX   VW Index in PCH GPIO

BUG=361048817
TEST=boot to OS and use iotools to read AUX Bias Ctrl register to
verify the group ID, bit number, and vw index.

Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: I0f9c895590465b2f539c91834cf331fcd7efa996
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83980
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>

0 files changed, 0 insertions, 0 deletions