diff options
| author | Matt DeVillier <matt.devillier@gmail.com> | 2024-09-12 16:01:55 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-09-16 14:14:32 +0000 |
| commit | ad8cac34a4c38ba490807395c75698bc20e02523 (patch) | |
| tree | c0f57b0608cab09da9b02426bf3cdad7b9d1f619 /src/mainboard/google/volteer/variants/halvor | |
| parent | 19788920cb64695f85baaea3248d7844bae11b93 (diff) | |
mb/google/volteer: Fix USB port definitions
Commit bc8f5405b542 ("tgl mainboards: Move usb{2,3}_ports settings into
XHCI device scope") not only moved the USB port definitions under the
XHCI device reference, but also combined multiple register definitions.
In doing so, it broke the inheritance from the baseboard, since the
variant overridetree registers now replaced the entire usb2_ports/
usb3_ports structs, rather than replacing individual array elements
therein. This resulted in any USB ports inherited from the baseboard
and not overridden by the variant being non-functional as they were
not included in the resulting combined devicetree.
To fix this, return to overriding individual array elements in the
usb2/3_ports structs.
TEST=build/boot google/drobit. Verify all USB ports present and
functional. Verify mainboard/static.c in built shows all ports.
Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84348
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/google/volteer/variants/halvor')
| -rw-r--r-- | src/mainboard/google/volteer/variants/halvor/overridetree.cb | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/src/mainboard/google/volteer/variants/halvor/overridetree.cb b/src/mainboard/google/volteer/variants/halvor/overridetree.cb index 589dfaf25a..46a9014ed1 100644 --- a/src/mainboard/google/volteer/variants/halvor/overridetree.cb +++ b/src/mainboard/google/volteer/variants/halvor/overridetree.cb @@ -122,14 +122,11 @@ chip soc/intel/tigerlake end end device ref south_xhci on - register "usb2_ports" = "{ - [1] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 0 - [3] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 1 - [4] = USB2_PORT_MID(OC_SKIP), // Front Camera - [5] = USB2_PORT_MID(OC_SKIP), // Type-A / Type-C Port 2 - [9] = USB2_PORT_MID(OC_SKIP), // Reserve for CNVi BT - }" - + register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 0 + register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 1 + register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Front Camera + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Type-A / Type-C Port 2 + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Reserve for CNVi BT chip drivers/usb/acpi device ref xhci_root_hub on chip drivers/usb/acpi |