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| author | Matt DeVillier <matt.devillier@gmail.com> | 2022-12-21 08:44:19 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-12-22 20:34:03 +0000 |
| commit | 0d54a65819c5ddd2dd4fe6543f4f60891b9d950c (patch) | |
| tree | e775f6a545fce9247e369feca660e67e1e96b291 /src/mainboard/google/volteer/variants/drobit | |
| parent | 0bffd0a1aea66489f31b1e6f11649d33ec9d3597 (diff) | |
mb/google/volteer: Use runtime detection for touchscreens
Now that power sequencing has been implemented, switch from using ACPI
"probed" flag to "detect" flag for all i2c touchscreens. This removes
non-present devices from the SSDT and relieves the OS of the burden of
probing.
BUG=b:121309055
TEST=build/boot Windows/linux on multiple volteer variants, verify all
touchscreens functional in OS, dump ACPI and verify only i2c devices
actually present on the board have entries in the SSDT.
Change-Id: I0448d12a36f522b715e1fbeb8d37eb5a925ebc93
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71183
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/drobit')
| -rw-r--r-- | src/mainboard/google/volteer/variants/drobit/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/volteer/variants/drobit/overridetree.cb b/src/mainboard/google/volteer/variants/drobit/overridetree.cb index f8059df333..89159c0e92 100644 --- a/src/mainboard/google/volteer/variants/drobit/overridetree.cb +++ b/src/mainboard/google/volteer/variants/drobit/overridetree.cb @@ -164,7 +164,7 @@ chip soc/intel/tigerlake register "generic.hid" = ""ELAN9008"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" |