diff options
| author | John Zhao <john.zhao@intel.com> | 2020-09-21 13:20:57 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-09-24 18:48:56 +0000 |
| commit | c8e309779f54827d8f30907ab8e3439582625a65 (patch) | |
| tree | 52672e4a28b80eb403588de2ebe0a6e33a71df8d /src/mainboard/google/volteer/variants/baseboard | |
| parent | c16fc8a49c4bae8da2b496dd8a59056ac57483f9 (diff) | |
mb/google/volteer: Enable CnviBtAudioOffload
This change enables CnviBtAudioOffload. FSP is invoked to configure
BT over USB and BT I2S pins for cAVS connection.
BUG=b:169045123
TEST=Verifed CnviBtCore and CnviBtAudioOffload settings and FSP
configuration. Booted up to kernel on Volteer.
Signed-off-by: John Zhao <john.zhao@intel.com>
Change-Id: I1780da0824d145a79743d5cffdea4821236d4f74
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Naveen M <naveen.m@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard')
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 11542f8964..43ba2551e2 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -230,6 +230,8 @@ chip soc/intel/tigerlake register "tcc_offset" = "10" # TCC of 90 + register "CnviBtAudioOffload" = "FORCE_ENABLE" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |