diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-08 19:22:07 +0530 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-05-20 16:36:28 +0000 |
| commit | 7d6bc60db9427f029f990002870e40541601a209 (patch) | |
| tree | 40b34a1431710e1be32205c5a2711664ab628244 /src/mainboard/google/volteer/variants/baseboard/devicetree.cb | |
| parent | 32585de39ea15b4192e213b7cfcf46485bfd0d2f (diff) | |
tigerlake: enable DPTF functionality for volteer
Enable DPTF functionality for volteer platform
BRANCH=None
BUG=b:149722146
TEST=Built and tested on volteer system
Change-Id: I385fb409ccd291d97369295ff99f21c9430880f9
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41427
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/volteer/variants/baseboard/devicetree.cb')
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 5d5dcc4b70..25b42c74f7 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -170,6 +170,16 @@ chip soc/intel/tigerlake # Enable S0ix register "s0ix_enable" = "1" + # Enable DPTF + register "dptf_enable" = "1" + + register "power_limits_config" = "{ + .tdp_pl1_override = 15, + .tdp_pl2_override = 60, + }" + + register "Device4Enable" = "1" + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | |