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authorJulius Werner <jwerner@chromium.org>2015-02-19 14:51:15 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:22:28 +0200
commit2f37bd65518865688b9234afce0d467508d6f465 (patch)
treeeba5ed799de966299602b30c70d51dd40eaadd73 /src/mainboard/google/veyron_rialto
parent1f60f971fc89ef841e81b978964b38278d597b1d (diff)
arm(64): Globally replace writel(v, a) with write32(a, v)
This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
-rw-r--r--src/mainboard/google/veyron_rialto/bootblock.c8
-rw-r--r--src/mainboard/google/veyron_rialto/mainboard.c14
-rw-r--r--src/mainboard/google/veyron_rialto/romstage.c2
3 files changed, 12 insertions, 12 deletions
diff --git a/src/mainboard/google/veyron_rialto/bootblock.c b/src/mainboard/google/veyron_rialto/bootblock.c
index ab9d60dad0..135aece472 100644
--- a/src/mainboard/google/veyron_rialto/bootblock.c
+++ b/src/mainboard/google/veyron_rialto/bootblock.c
@@ -38,7 +38,7 @@ void bootblock_mainboard_early_init()
{
if (IS_ENABLED(CONFIG_DRIVERS_UART)) {
assert(CONFIG_CONSOLE_SERIAL_UART_ADDRESS == UART2_BASE);
- writel(IOMUX_UART2, &rk3288_grf->iomux_uart2);
+ write32(&rk3288_grf->iomux_uart2, IOMUX_UART2);
}
}
@@ -62,12 +62,12 @@ void bootblock_mainboard_init(void)
rkclk_configure_cpu();
/* i2c1 for tpm */
- writel(IOMUX_I2C1, &rk3288_grf->iomux_i2c1);
+ write32(&rk3288_grf->iomux_i2c1, IOMUX_I2C1);
i2c_init(1, 400*KHz);
/* spi2 for firmware ROM */
- writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk);
- writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx);
+ write32(&rk3288_grf->iomux_spi2csclk, IOMUX_SPI2_CSCLK);
+ write32(&rk3288_grf->iomux_spi2txrx, IOMUX_SPI2_TXRX);
rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS, 11*MHz);
setup_chromeos_gpios();
diff --git a/src/mainboard/google/veyron_rialto/mainboard.c b/src/mainboard/google/veyron_rialto/mainboard.c
index d03a917c09..eb6efd3290 100644
--- a/src/mainboard/google/veyron_rialto/mainboard.c
+++ b/src/mainboard/google/veyron_rialto/mainboard.c
@@ -50,25 +50,25 @@ static void configure_usb(void)
static void configure_emmc(void)
{
- writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata);
- writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
- writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
+ write32(&rk3288_grf->iomux_emmcdata, IOMUX_EMMCDATA);
+ write32(&rk3288_grf->iomux_emmcpwren, IOMUX_EMMCPWREN);
+ write32(&rk3288_grf->iomux_emmccmd, IOMUX_EMMCCMD);
gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */
}
static void configure_codec(void)
{
- writel(IOMUX_I2C2, &rk3288_grf->iomux_i2c2); /* CODEC I2C */
+ write32(&rk3288_grf->iomux_i2c2, IOMUX_I2C2); /* CODEC I2C */
i2c_init(2, 400*KHz); /* CODEC I2C */
- writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
- writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
+ write32(&rk3288_grf->iomux_i2s, IOMUX_I2S);
+ write32(&rk3288_grf->iomux_i2sclk, IOMUX_I2SCLK);
rk808_configure_ldo(6, 1800); /* VCC18_CODEC */
/* AUDIO IO domain 1.8V voltage selection */
- writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
+ write32(&rk3288_grf->io_vsel, RK_SETBITS(1 << 6));
rkclk_configure_i2s(12288000);
}
diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c
index f3883bd28f..9be13fe894 100644
--- a/src/mainboard/google/veyron_rialto/romstage.c
+++ b/src/mainboard/google/veyron_rialto/romstage.c
@@ -49,7 +49,7 @@ static void regulate_vdd_log(unsigned int mv)
const u32 max_regulator_mv = 1350; /* 1.35V */
const u32 min_regulator_mv = 870; /* 0.87V */
- writel(IOMUX_PWM1, &rk3288_grf->iomux_pwm1);
+ write32(&rk3288_grf->iomux_pwm1, IOMUX_PWM1);
assert((mv >= min_regulator_mv) && (mv <= max_regulator_mv));