summaryrefslogtreecommitdiff
path: root/src/mainboard/google/veyron_rialto
diff options
context:
space:
mode:
authorShelley Chen <shchen@google.com>2020-10-21 22:46:14 -0700
committerShelley Chen <shchen@google.com>2020-10-23 06:05:22 +0000
commit0263e0ff65d50a616e1ae04ab0837c0d90118d19 (patch)
treea1ce28d422fecc6198545ae056639f36eae58d6c /src/mainboard/google/veyron_rialto
parent3827f56fe1f97c4dc19af94782ed9cce89cec723 (diff)
sc7180: enable RECOVERY_MRC_CACHE
Enable caching of memory training data for recovery as well as normal mode because memory training is taking too long in recovery as well. This required creating a space in the fmap for RECOVERY_MRC_CACHE. BUG=b:150502246 BRANCH=None TEST=Run power_state:rec twice on lazor. Ensure that on first boot, memory training occurs and on second boot, memory training is skipped. Change-Id: Id9059a8edd7527b0fe6cdc0447920d5ecbdf296e Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46651 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
0 files changed, 0 insertions, 0 deletions