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authorjinkun.hong <jinkun.hong@rock-chips.com>2015-03-03 14:20:58 +0800
committerPatrick Georgi <pgeorgi@google.com>2015-04-21 08:19:00 +0200
commit19ee1569f6d411d26111afc0552e6a11178e1890 (patch)
tree27208161f0afe57bb48ea96ccaa7238a9547b3ed /src/mainboard/google/veyron_rialto
parentc447f43f94e03bdf6666bfb956e0614869ad0915 (diff)
veyron: The ODT function is disabled for LPDDR3
We found that we should better keep ODT off for LPDDR3 on our boards. BRANCH=veyron BUG=chrome-os-partner:37346 TEST=Boot veyron_speedy normal Change-Id: Id158c88769cf7ed1a5127cd09bad679a2f5e6a01 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 0d85725a6faedb5bdbe8731991c225c31f138599 Original-Change-Id: Iebb8e74706756508dd56b85ad87baad48893c619 Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com> Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/255381 Reviewed-on: http://review.coreboot.org/9830 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron_rialto')
-rw-r--r--src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc
index 53ea142f09..9afd04fdd1 100644
--- a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc
+++ b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc
@@ -73,5 +73,5 @@
.dramtype = LPDDR3,
.num_channels = 1,
.stride = 22,
- .odt = 1
+ .odt = 0,
},