From 19ee1569f6d411d26111afc0552e6a11178e1890 Mon Sep 17 00:00:00 2001 From: "jinkun.hong" Date: Tue, 3 Mar 2015 14:20:58 +0800 Subject: veyron: The ODT function is disabled for LPDDR3 We found that we should better keep ODT off for LPDDR3 on our boards. BRANCH=veyron BUG=chrome-os-partner:37346 TEST=Boot veyron_speedy normal Change-Id: Id158c88769cf7ed1a5127cd09bad679a2f5e6a01 Signed-off-by: Patrick Georgi Original-Commit-Id: 0d85725a6faedb5bdbe8731991c225c31f138599 Original-Change-Id: Iebb8e74706756508dd56b85ad87baad48893c619 Original-Signed-off-by: jinkun.hong Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/255381 Reviewed-on: http://review.coreboot.org/9830 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- .../google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/veyron_rialto') diff --git a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc index 53ea142f09..9afd04fdd1 100644 --- a/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc +++ b/src/mainboard/google/veyron_rialto/sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc @@ -73,5 +73,5 @@ .dramtype = LPDDR3, .num_channels = 1, .stride = 22, - .odt = 1 + .odt = 0, }, -- cgit v1.2.3