diff options
| author | David Hendricks <dhendrix@chromium.org> | 2015-03-03 20:19:31 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:20:39 +0200 |
| commit | ebdef9fab34f6e3545956dfdc3605a7433734c28 (patch) | |
| tree | 19f8e4495f92492660bf619a900a82251c0e808a /src/mainboard/google/veyron_brain | |
| parent | 3704e69e472d68e52c9e8a64b648fbf80f6e0e63 (diff) | |
veyron_{brain,danger}: Specify vboot romstage and ramstage indices
This applies the same hack to Danger and Brain as on Rialto which
allows us to remove the EC-related sections from their respective
flashmaps.
BUG=none
BRANCH=veyron
CQ-DEPEND=CL:255669
TEST=built and booted on Brain w/ depthcharge and mosys changes,
was able to read vbnv data from userspace
Change-Id: I95715d59a21cd081ac4a3a2216576ede5620f1a5
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4de4273be9ac80ca77a34bc076d1f265fbb94e9f
Original-Change-Id: I6c2041e8c17ab157599255a505aaef5e2447a241
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/255780
Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9832
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/veyron_brain')
| -rw-r--r-- | src/mainboard/google/veyron_brain/Kconfig | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/veyron_brain/Kconfig b/src/mainboard/google/veyron_brain/Kconfig index 6361d9e7e2..e5e38f9e5d 100644 --- a/src/mainboard/google/veyron_brain/Kconfig +++ b/src/mainboard/google/veyron_brain/Kconfig @@ -48,9 +48,16 @@ config MAINBOARD_VENDOR string default "Google" +# The 'ecrwhash' is removed from FMAP on Brain, since we don't have EC. +# As a result, we have to hack RAMSTAGE and ROMSTAGE index until there are +# better approaches for vboot2 to find right index. config VBOOT_RAMSTAGE_INDEX hex - default 0x3 + default 0x2 + +config VBOOT_ROMSTAGE_INDEX + hex + default 0x1 config BOOT_MEDIA_SPI_BUS int |