diff options
author | David Hendricks <dhendrix@chromium.org> | 2014-12-19 15:34:08 -0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-04-15 16:42:18 +0200 |
commit | 16e32ed2f317c410382ed3c4a37380d4e82cf9bb (patch) | |
tree | a7f9f78db47d180457f520f91f831f179b4341a8 /src/mainboard/google/veyron_brain/mainboard.c | |
parent | 7f00962e70c57b0fc6faf50b8fbf26f95b96e6d2 (diff) |
Brain: Initial mainboard import
This adds a directory with files copied over from Jerry, in addition to
build system related changes (configs/* and Kconfig stuff) necessary
to emerge-veyron_brain coreboot.
The next patch will account for differences between Jerry and Brain.
BUG=none
BRANCH=none
TEST=emerge-veyron_brain coreboot works
Change-Id: Ib0da9caf80f46991b96bcb5756f807237f0902e1
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 9509d6277dae25a78062c1301054a39f704b33fe
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: I972f2623d9b0a43e3ea5312b3c4cd34ab44edc36
Original-Reviewed-on: https://chromium-review.googlesource.com/236989
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9637
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/mainboard/google/veyron_brain/mainboard.c')
-rw-r--r-- | src/mainboard/google/veyron_brain/mainboard.c | 157 |
1 files changed, 157 insertions, 0 deletions
diff --git a/src/mainboard/google/veyron_brain/mainboard.c b/src/mainboard/google/veyron_brain/mainboard.c new file mode 100644 index 0000000000..d9952605dc --- /dev/null +++ b/src/mainboard/google/veyron_brain/mainboard.c @@ -0,0 +1,157 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/cache.h> +#include <arch/io.h> +#include <boot/coreboot_tables.h> +#include <console/console.h> +#include <delay.h> +#include <device/device.h> +#include <device/i2c.h> +#include <edid.h> +#include <gpio.h> +#include <soc/display.h> +#include <soc/grf.h> +#include <soc/soc.h> +#include <soc/pmu.h> +#include <soc/clock.h> +#include <soc/rk808.h> +#include <soc/spi.h> +#include <soc/i2c.h> +#include <symbols.h> +#include <vbe.h> + +#include "board.h" + +static void configure_usb(void) +{ + gpio_output(GPIO(0, B, 3), 1); /* HOST1_PWR_EN */ + gpio_output(GPIO(0, B, 4), 1); /* USBOTG_PWREN_H */ + gpio_output(GPIO(7, C, 5), 1); /* 5V_DRV */ +} + +static void configure_sdmmc(void) +{ + writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0); + + /* use sdmmc0 io, disable JTAG function */ + writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0); + + /* Note: these power rail definitions are copied in romstage.c */ + rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */ + rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */ + + gpio_input(GPIO(7, A, 5)); /* SD_DET */ +} + +static void configure_emmc(void) +{ + writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata); + writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren); + writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd); + + gpio_output(GPIO(2, B, 1), 1); /* EMMC_RST_L */ +} + +static void configure_codec(void) +{ + writel(IOMUX_I2C2, &rk3288_grf->iomux_i2c2); /* CODEC I2C */ + i2c_init(2, 400*KHz); /* CODEC I2C */ + + writel(IOMUX_I2S, &rk3288_grf->iomux_i2s); + writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk); + + rk808_configure_ldo(PMIC_BUS, 6, 1800); /* VCC18_CODEC */ + + /* AUDIO IO domain 1.8V voltage selection */ + writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel); + rkclk_configure_i2s(12288000); +} + +static void configure_vop(void) +{ + writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc); + + /* lcdc(vop) iodomain select 1.8V */ + writel(RK_SETBITS(1 << 0), &rk3288_grf->io_vsel); + + switch (board_id()) { + case 2: + rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */ + rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ + rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + break; + default: + gpio_output(GPIO(2, B, 5), 1); /* AVDD_1V8_DISP_EN */ + rk808_configure_ldo(PMIC_BUS, 7, 2500); /* VCC10_LCD_PWREN_H */ + gpio_output(GPIO(7, B, 6), 1); /* LCD_EN */ + rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */ + break; + } +} + +static void mainboard_init(device_t dev) +{ + gpio_output(GPIO_RESET, 0); + + configure_usb(); + configure_sdmmc(); + configure_emmc(); + configure_codec(); + configure_vop(); +} + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; + +void lb_board(struct lb_header *header) +{ + struct lb_range *dma; + + dma = (struct lb_range *)lb_new_record(header); + dma->tag = LB_TAB_DMA; + dma->size = sizeof(*dma); + dma->range_start = (uintptr_t)_dma_coherent; + dma->range_size = _dma_coherent_size; +} + +void mainboard_power_on_backlight(void) +{ + switch (board_id()) { + case 2: + gpio_output(GPIO(7, A, 0), 0); /* BL_EN */ + gpio_output(GPIO(7, A, 2), 1); /* LCD_BL */ + mdelay(10); + gpio_output(GPIO(7, A, 0), 1); /* BL_EN */ + break; + default: + gpio_output(GPIO(2, B, 4), 1); /* BL_PWR_EN */ + mdelay(10); + gpio_output(GPIO(7, A, 2), 1); /* LCD_BL */ + mdelay(10); + gpio_output(GPIO(7, A, 0), 1); /* BL_EN */ + break; + } +} |