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authorSubrata Banik <subratabanik@google.com>2022-11-23 14:46:16 +0530
committerSubrata Banik <subratabanik@google.com>2022-11-24 06:24:52 +0000
commit98b696703e8e508dd57b467a557f9bc7567f7e6d (patch)
tree600f656e6f71ad7a65a8acdf75750ec4f660c90f /src/mainboard/google/veyron
parentfb43107e62ffba04f2d9aafad05c794d904471aa (diff)
soc/intel/meteorlake: Decouple HECI disabling interface from its Kconfig
This patch decouples HECI disabling interface a.k.a SMM or PCR or PMC IPC etc. from DISABLE_HECI1_AT_PRE_BOOT kconfig as Intel ME BWG recommends to disable the CSE PCI device while CSE is in software temporary disable state. BUG=b:260183610 TEST=Able to build google/rex. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I3c9c5a73028cde90af3553093a13d0c05b831bae Reviewed-on: https://review.coreboot.org/c/coreboot/+/69930 Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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