diff options
author | Duncan Laurie <dlaurie@google.com> | 2015-12-22 17:09:16 -0800 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-12-27 17:42:58 +0100 |
commit | 791d0580b8961decbc9a841b58341340ac206c4f (patch) | |
tree | 5712220902362c6f7acfe0369b4ecd0daf95818a /src/mainboard/google/urara | |
parent | 9d08c4a5fd006e14060d03e590df1f31ce3e7c5c (diff) |
broadwell: Fix SATA Gen3 DTLE configuration registers
The port0 and port1 registers were swapped, which meant it did
not work to apply the DTLE settings to the correct SATA port.
This was tested on an unreleased mainboard but is verified with
the documentation to be the correct register addresses now.
Change-Id: Ifb8890a563a741129ec8ddf72e73ab021c7d33da
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/12793
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard/google/urara')
0 files changed, 0 insertions, 0 deletions