summaryrefslogtreecommitdiff
path: root/src/mainboard/google/trogdor/Makefile.inc
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2023-07-13 18:31:13 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-11-30 15:16:47 +0000
commit98a46fb2dd2319b5971b57b345e0dddcf5c6880f (patch)
tree5ebd1738ae70fe8ab1d8557022dc3fece19d8f19 /src/mainboard/google/trogdor/Makefile.inc
parent63ad72db6c2a93c15f9498b985b83413c6190cfc (diff)
vendorcode/amd/opensil: Implement cbmem_top_chipset
Use an xPRF call to get the top of lower DRAM. Organize Makefile to keep romstage/ramstage components separate. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Martin Roth <gaumless@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76513 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/mainboard/google/trogdor/Makefile.inc')
0 files changed, 0 insertions, 0 deletions