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authorJulius Werner <jwerner@chromium.org>2014-05-30 18:01:44 -0700
committerMarc Jones <marc.jones@se-eng.com>2015-01-04 00:15:17 +0100
commit028cba9266e531d9d7c5e39432bbb7eeda6398ed (patch)
tree20e7c32ea7fb9c1d676790a2b8f20f7a0bf45f03 /src/mainboard/google/storm/Kconfig
parent96ef1883a7a8b95f297f99fa7409f27c0f344d88 (diff)
ipq806x: Add USB support
This patch adds code to initialize the two DWC3 USB host controllers and their associated PHYs to the IPQ806x SoC (closely imitating the existing DWC3 implementation for Exynos5), and uses them to initialize USB on the Storm mainboard. BUG=chrome-os-partner:29375 TEST=Hack up netboot to get around missing SPI flash, load a file over TFTP. Hack a storage read into the storage attach function, dump the data and confirm that it looks right. Enable USB debugging and confirm 3.0 devices get enumerated at SuperSpeed (mostly). Original-Change-Id: Iaf7b96bef994081ca222b7de9d8e8c49751d3f1d Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/202157 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit 6349e7281d5accb1247acb0537a48fa3a5e1bf97) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I749d265d45c6a807a7559bd4df2490a6eb8067af Reviewed-on: http://review.coreboot.org/8056 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/storm/Kconfig')
-rw-r--r--src/mainboard/google/storm/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/storm/Kconfig b/src/mainboard/google/storm/Kconfig
index 4c90c4e094..1063f83ddd 100644
--- a/src/mainboard/google/storm/Kconfig
+++ b/src/mainboard/google/storm/Kconfig
@@ -40,4 +40,12 @@ config DRAM_SIZE_MB
int
default 512
+config DRAM_DMA_START
+ hex
+ default 0x5a000000
+
+config DRAM_DMA_SIZE
+ hex
+ default 0x00200000
+
endif # BOARD_GOOGLE_STORM