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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-11-03 13:16:27 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-09 07:38:47 +0000 |
commit | 8a78f5903952f1dee3ecbde8b8ea613c78639d48 (patch) | |
tree | 4a1abec64f3be62c828d57b37642c25c0e97e2d7 /src/mainboard/google/smaug | |
parent | 8a1ad138225e5a31d75cd77b9d7f183f3ab6d39c (diff) |
soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log
All wakes by a PCH PCIe root port were lumped under one event source;
this commit splits them up so each root port gets its own ID in the
event log.
BUG=b:172279061
BRANCH=volteer
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Icebcac3b69c605ecf6df37733b641397ea3c3ad0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google/smaug')
0 files changed, 0 insertions, 0 deletions