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authorDuncan Laurie <dlaurie@chromium.org>2013-07-30 15:43:43 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 07:39:40 +0100
commitf47c4bcd01ffb1c1279eb94481ca0143608a0983 (patch)
treec7153b9a46fd4d4554dadcb2bf91749bf564a0b2 /src/mainboard/google/slippy
parent289bac6a04f5cb16a9297c31e7a11013b0b51eb4 (diff)
slippy/falco/peppy: Route USB to XHCI on resume
Turn on the pei_data flag that will instruct the reference code binary to route all USB ports to the XHCI controller on resume and disable the EHCI controller(s). Change-Id: I2f2ed853a6d17f90ea524bc516f3e78079222739 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/63798 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4404 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/google/slippy')
-rw-r--r--src/mainboard/google/slippy/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index a93196a95b..fdbac97695 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -158,6 +158,7 @@ void mainboard_romstage_entry(unsigned long bist)
dimm_channel0_disabled: 2,
dimm_channel1_disabled: 2,
max_ddr3_freq: 1600,
+ usb_xhci_on_resume: 1,
usb2_ports: {
/* Length, Enable, OCn#, Location */
{ 0x0150, 1, USB_OC_PIN_SKIP, /* P0: LTE */