diff options
| author | Jon Murphy <jpmurphy@google.com> | 2022-02-16 06:47:46 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-26 00:17:10 +0000 |
| commit | cbf0f98c6179c6f57080d44355e766221ca92669 (patch) | |
| tree | a807ca5f9f3d1d74cadf629f6df9ab3d7bd7240c /src/mainboard/google/skyrim/variants | |
| parent | 9e00571b49e14d7b81f4601ff04597fb12dd5d61 (diff) | |
mb/google/skyrim: Enable Chrome EC
BUG=b:214413613
TEST=builds
BRANCH=none
Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I15c7c482c4a5ddef22a221794b9ef03f9b7ffe05
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62046
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/skyrim/variants')
| -rw-r--r-- | src/mainboard/google/skyrim/variants/baseboard/devicetree.cb | 5 | ||||
| -rw-r--r-- | src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h | 80 |
2 files changed, 85 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index ed77b0b181..04e0b51f27 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -1,5 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later chip soc/amd/sabrina device domain 0 on + device ref lpc_bridge on + chip ec/google/chromeec + device pnp 0c09.0 alias chrome_ec on end + end + end end # domain end # chip soc/amd/sabrina diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h new file mode 100644 index 0000000000..d66d3cb775 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/ec.h @@ -0,0 +1,80 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __MAINBOARD_EC_H__ +#define __MAINBOARD_EC_H__ + +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> +#include <baseboard/gpio.h> +#include <soc/gpio.h> + +#define MAINBOARD_EC_SCI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) + +#define MAINBOARD_EC_SMI_EVENTS (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) + +/* EC can wake from S5 with lid or power button */ +#define MAINBOARD_EC_S5_WAKE_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) + +/* EC can wake from S3 with lid, power button or mode change event */ +#define MAINBOARD_EC_S3_WAKE_EVENTS \ + (MAINBOARD_EC_S5_WAKE_EVENTS \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) + +#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS) + +/* Log EC wake events plus EC shutdown events */ +#define MAINBOARD_EC_LOG_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) \ + | EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) + +/* + * ACPI related definitions for ASL code. + */ + +/* Set GPI for SCI */ +#define EC_SCI_GPI GEVENT_3 /* eSPI system event -> GPE 3 */ + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GEVENT_5 /* AGPIO 11 -> GPE 5 */ + +/* Enable Tablet switch */ +#define EC_ENABLE_TBMC_DEVICE + +#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ +#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ +#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ + +/* Enable EC sync interrupt */ +#define EC_ENABLE_SYNC_IRQ_GPIO + +/* EC sync irq */ +#define EC_SYNC_IRQ GPIO_84 + +/* Enable EC backed PD MCU device in ACPI */ +#define EC_ENABLE_PD_MCU_DEVICE + +/* Enable EC backed Keyboard Backlight in ACPI */ +#define EC_ENABLE_KEYBOARD_BACKLIGHT + +#endif /* __MAINBOARD_EC_H__ */ |