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authorIsaac Lee <isaaclee@google.com>2022-08-10 09:30:08 -0700
committerRaul Rangel <rrangel@chromium.org>2022-08-16 17:50:42 +0000
commita3214c6d763f194b766b967720e7a02d0bfdccdc (patch)
tree3c061f35377aa3940c45a64f92cf04b6a6ec88af /src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
parent692db41b7dd561e490a7d2d3fec1f12fa5034f31 (diff)
mb/google/skyrim: Create winterhold variant
Create the winterhold variant of the skyrim reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0). BUG=b:240970782 BRANCH=None TEST=util/abuild/abuild -p none -t google/skyrim -x -a make sure the build includes GOOGLE_WINTERHOLD Signed-off-by: Isaac Lee <isaaclee@google.com> Change-Id: I0e16f0a674aa3f4687cd82d5840a3c2087148a51 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66620 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/winterhold/overridetree.cb')
-rw-r--r--src/mainboard/google/skyrim/variants/winterhold/overridetree.cb32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
new file mode 100644
index 0000000000..e0becd4173
--- /dev/null
+++ b/src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+chip soc/amd/mendocino
+
+ # I2C Config
+ #+-------------------+----------------------------+
+ #| Field | Value |
+ #+-------------------+----------------------------+
+ #| I2C0 | Trackpad |
+ #| I2C1 | Touchscreen |
+ #| I2C2 | Speaker, Codec, P-SAR, USB |
+ #| I2C3 | D2 TPM |
+ #+-------------------+----------------------------+
+ register "i2c[0]" = "{
+ .speed = I2C_SPEED_FAST,
+ }"
+
+ register "i2c[1]" = "{
+ .speed = I2C_SPEED_FAST,
+ }"
+
+ register "i2c[2]" = "{
+ .speed = I2C_SPEED_FAST,
+ }"
+
+ register "i2c[3]" = "{
+ .speed = I2C_SPEED_FAST,
+ .early_init = true,
+ }"
+
+ device domain 0 on end
+end # chip soc/amd/mendocino