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authorJohn Su <john_su@compal.corp-partner.google.com>2023-03-30 13:46:03 +0800
committerKarthik Ramasubramanian <kramasub@google.com>2023-04-11 15:56:55 +0000
commitd9b938b0cf2da9278ddef3287156569789d39cae (patch)
treeecbfffc7e6c76d1f7801bba4b70724f9320683bc /src/mainboard/google/skyrim/variants/markarth/overridetree.cb
parent166387f7903299287cea9537a3758ab66b56f42e (diff)
mb/google/skyrim: Enable UPD usb3_port_force_gen1 for Markarth
From request, all type C port limit to to Gen1 5GHz. So enable UPD usb3_port_force_gen1 for Markarth. BUG=b:273841155 BRANCH=skyrim TEST=Build, verify the setting will be applied on Markarth. Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: I9314b67a82ad2993c87f0110db5ec927caaa772b Reviewed-on: https://review.coreboot.org/c/coreboot/+/74087 Reviewed-by: Patrick Huang <patrick.huang@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chao Gui <chaogui@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Reviewed-by: Amanda Hwang <amanda_hwang@compal.corp-partner.google.com> Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/markarth/overridetree.cb')
-rw-r--r--src/mainboard/google/skyrim/variants/markarth/overridetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/markarth/overridetree.cb b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
index f82fe1bb30..3939d657ee 100644
--- a/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
@@ -6,6 +6,13 @@ chip soc/amd/mendocino
# Remove the sustained_power_limit_mW when STT is enabled
register "sustained_power_limit_mW" = "15000"
+ # set usb3 port force to gen1
+ register "usb3_port_force_gen1" = "{
+ .ports.xhci0_port0 = 1,
+ .ports.xhci1_port0 = 1,
+ .ports.xhci1_port1 = 0,
+ }"
+
device domain 0 on
register "dxio_tx_vboost_enable" = "1"