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authorYunlong Jia <yunlong.jia@ecs.corp-partner.google.com>2023-02-17 09:09:39 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-02-23 12:12:43 +0000
commita417bcb8c377f5c8e0d1b9e793ee0a085327c3b1 (patch)
treecac351aeab70417e6823ce4c9db44f7c50211732 /src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb
parent5d4cee75e521b50bd40a1f8cb37be4138e04e67c (diff)
mb/google/skyrim/var/crystaldrift: Update devicetree setting
Setup FW_Config for our project. Configure USBHub\PIXA Touchpad\Audio(rt5682s & alc1019). BRANCH=None BUG=b:262798445, b:268621319 TEST=emerge-skyrim coreboot Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> Change-Id: I2c590ae36d4d089f70e1799189cd414f825e5b8b Reviewed-on: https://review.coreboot.org/c/coreboot/+/73048 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chao Gui <chaogui@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb')
-rw-r--r--src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb127
1 files changed, 126 insertions, 1 deletions
diff --git a/src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb b/src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb
index 7a56f93759..60461c8447 100644
--- a/src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/crystaldrift/overridetree.cb
@@ -1,5 +1,130 @@
# SPDX-License-Identifier: GPL-2.0-or-later
+fw_config
+ field FORM_FACTOR 0
+ option FORM_FACTOR_CLAMSHELL 0
+ end
+ field FP 1
+ option FP_ABSENT 1
+ end
+ field WLAN 2 3
+ option WLAN_MT7921LE 0
+ end
+ field WWAN 4 5
+ option WWAN_DIASABLED 0
+ end
+ field IO_DB 6 7
+ option IO_DB_A1_None_C1_ANX7493QN 1
+ end
+ field AUDIO_DB 8 9
+ option AUDIO_DB_C_ALC5682I_A_ALC1019 1
+ end
+end
chip soc/amd/mendocino
- device domain 0 on end
+ device domain 0 on
+ device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
+ device ref xhci_1 on # XHCI1 controller
+ chip drivers/usb/acpi
+ device ref xhci_1_root_hub on # XHCI1 root hub
+ chip drivers/usb/acpi
+ device ref usb3_port3 on # USB 3.1 port3
+ chip drivers/usb/hub
+ register "desc" = ""USB Hub""
+ register "name" = ""RTS5414E""
+ register "port_count" = "4"
+ device usb 0.0 on # RTS5414E USB3 hub
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-A Port A0 (MLB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
+ device usb 3.0 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB3 Type-A Port A1 (DB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))"
+ device usb 3.2 on end
+ end
+ end # RTS5414E USB3 hub
+ end
+ end # USB 3.1 port3
+ end
+ chip drivers/usb/acpi
+ device ref usb2_port3 on # USB 2 port3
+ chip drivers/usb/hub
+ register "desc" = ""USB Hub""
+ register "name" = ""RTS5414E""
+ register "port_count" = "4"
+ device usb 0.0 on # RTS5414E USB2 hub
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-A Port A0 (MLB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(2, 2))"
+ device usb 2.0 on end
+ end
+ chip drivers/usb/acpi
+ register "desc" = ""USB2 Type-A Port A1 (DB)""
+ register "type" = "UPC_TYPE_USB3_A"
+ register "use_custom_pld" = "true"
+ register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, CENTER, ACPI_PLD_GROUP(3, 1))"
+ device usb 2.2 on end
+ end
+ end # RTS5414E USB2 hub
+ end
+ end # USB 2 port3
+ end
+ end # XHCI1 root hub
+ end
+ end # XHCI1 controller
+ end # Internal GPP Bridge 0 to Bus A
+ end
+
+ device ref i2c_0 on
+ chip drivers/i2c/hid
+ register "generic.hid" = ""PIXA2635""
+ register "generic.desc" = ""PIXA Touchpad""
+ register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_40)"
+ #register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_40)"
+ register "generic.wake" = "GEVENT_20"
+ register "generic.detect" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 15 on end
+ end
+ end # I2C0
+
+ device ref i2c_2 on
+ chip drivers/i2c/generic
+ register "hid" = ""RTL5682""
+ register "name" = ""RT58""
+ register "desc" = ""Realtek RT5682""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_90)"
+ register "property_count" = "1"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ device i2c 1a on
+ probe AUDIO_DB AUDIO_DB_C_ALC5682I_A_ALC1019
+ end
+ end
+ chip drivers/i2c/generic
+ register "hid" = ""10EC1019""
+ register "desc" = ""Realtek SPK AMP R""
+ register "uid" = "1"
+ device i2c 29 on
+ probe AUDIO_DB AUDIO_DB_C_ALC5682I_A_ALC1019
+ end
+ end
+ chip drivers/i2c/generic
+ register "hid" = ""10EC1019""
+ register "desc" = ""Realtek SPK AMP L""
+ register "uid" = "2"
+ register "probed" = "1"
+ device i2c 2a on
+ probe AUDIO_DB AUDIO_DB_C_ALC5682I_A_ALC1019
+ end
+ end
+ end # I2C2
end # chip soc/amd/mendocino