summaryrefslogtreecommitdiff
path: root/src/mainboard/google/skyrim/variants/baseboard
diff options
context:
space:
mode:
authorZheng Bao <fishbaozi@gmail.com>2024-07-25 14:21:23 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-08-24 12:54:54 +0000
commitc14cde65767c404dba9dbe5fdcac89fc64c43750 (patch)
tree81709f5335dd702bbed39719bd40e562cec2a6ae /src/mainboard/google/skyrim/variants/baseboard
parentdfd82d2608be110e677eedd0270e58ec25e0a0bf (diff)
mb/google/skyrim: Combine the function port_descriptors for variants
Remove the weak function. Combine all the getting descriptors together. BUG=b:279144932 TEST=Build Change-Id: I981e9c52c8e5fa32296e2e43be47411557133691 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83646 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/baseboard')
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/include/baseboard/port_descriptors.h16
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/port_descriptors.c32
2 files changed, 45 insertions, 3 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/port_descriptors.h b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/port_descriptors.h
index 1315379af6..16c3652d17 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/port_descriptors.h
+++ b/src/mainboard/google/skyrim/variants/baseboard/include/baseboard/port_descriptors.h
@@ -54,4 +54,20 @@
.clk_req = CLK_REQ0, \
}
+#define EMMC_DXIO_DESCRIPTOR { \
+ .engine_type = PCIE_ENGINE, \
+ .port_present = true, \
+ .start_logical_lane = 1, \
+ .end_logical_lane = 1, \
+ .device_number = PCI_SLOT(SD_DEVFN), \
+ .function_number = PCI_FUNC(SD_DEVFN), \
+ .link_speed_capability = GEN3, \
+ .turn_off_unused_lanes = true, \
+ .link_aspm = ASPM_L1, \
+ .link_aspm_L1_1 = true, \
+ .link_aspm_L1_2 = true, \
+ .gpio_group_id = GPIO_6, \
+ .clk_req = CLK_REQ1, \
+}
+
#endif //__BASEBOARD_PORT_DESCRIPTORS_H__
diff --git a/src/mainboard/google/skyrim/variants/baseboard/port_descriptors.c b/src/mainboard/google/skyrim/variants/baseboard/port_descriptors.c
index 296bb18ff2..66ecbdafa5 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/port_descriptors.c
+++ b/src/mainboard/google/skyrim/variants/baseboard/port_descriptors.c
@@ -3,6 +3,20 @@
#include <baseboard/variants.h>
#include <baseboard/port_descriptors.h>
#include <soc/platform_descriptors.h>
+#include <console/console.h>
+
+enum emmc_dxio_port_id {
+ EMMC_DXIO_WLAN,
+ EMMC_DXIO_STORAGE,
+};
+
+static fsp_dxio_descriptor emmc_dxio_descriptors[] = {
+ [EMMC_DXIO_WLAN] = WLAN_DXIO_DESCRIPTOR,
+ /* This value modified at runtime, default to emmc */
+ [EMMC_DXIO_STORAGE] = EMMC_DXIO_DESCRIPTOR,
+};
+
+#define EMMC_CLKREQ_GPIO 115
enum baseboard_dxio_port_id {
BASEBOARD_DXIO_WLAN,
@@ -16,8 +30,20 @@ static fsp_dxio_descriptor skyrim_mdn_dxio_descriptors[] = {
[BASEBOARD_DXIO_STORAGE] = NVME_DXIO_DESCRIPTOR,
};
-__weak void variant_get_dxio_descriptors(const fsp_dxio_descriptor **dxio_descriptor, size_t *num)
+void variant_get_dxio_descriptors(const fsp_dxio_descriptor **dxio_descriptor, size_t *num)
{
- *dxio_descriptor = skyrim_mdn_dxio_descriptors;
- *num = ARRAY_SIZE(skyrim_mdn_dxio_descriptors);
+ if (CONFIG(BOARD_GOOGLE_MARKARTH) || CONFIG(BOARD_GOOGLE_WINTERHOLD)) {
+ if (gpio_get(EMMC_CLKREQ_GPIO)) {
+ printk(BIOS_DEBUG, "Enabling NVMe.\n");
+ emmc_dxio_descriptors[EMMC_DXIO_STORAGE] =
+ (fsp_dxio_descriptor)NVME_DXIO_DESCRIPTOR;
+ } else {
+ printk(BIOS_DEBUG, "Defaulting to eMMC.\n");
+ }
+ *dxio_descriptor = emmc_dxio_descriptors;
+ *num = ARRAY_SIZE(emmc_dxio_descriptors);
+ } else {
+ *dxio_descriptor = skyrim_mdn_dxio_descriptors;
+ *num = ARRAY_SIZE(skyrim_mdn_dxio_descriptors);
+ }
}