diff options
author | Tim Van Patten <timvp@google.com> | 2022-11-22 10:40:14 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-29 15:24:19 +0000 |
commit | 5bd21db8ebfcbbfb6515569fa013904998f58f09 (patch) | |
tree | 048e4d28625313d6a985bf0c7f415d91d5ea35b2 /src/mainboard/google/skyrim/variants/baseboard/devicetree.cb | |
parent | 1c727fd784883865db8ab2a2828cfd18519ce151 (diff) |
mb/google/skyrim: Move common DPTC values to devicetree.cb
The Skyrim devices share a common set of DPTC values to enable booting
with low/no battery. Rather than duplicating them in each variant's
overridetree.cb, move them into the baseboard/devicetree.cb.
BUG=b:217911928
TEST=tast run <IP> power.ShutdownWithCommandBatteryCutoff
Change-Id: I20f0a8259c2fc986da23026da88feadd69942046
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69904
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/skyrim/variants/baseboard/devicetree.cb')
-rw-r--r-- | src/mainboard/google/skyrim/variants/baseboard/devicetree.cb | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb index 8502c36d36..3b98246d19 100644 --- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb @@ -239,4 +239,22 @@ chip soc/amd/mendocino device generic 3 on end end + + # DPTC: Refer the spec "FT6 Infrastructure Roadmap"#57316 + # Set system_configuration to 4 for 15W + register "system_configuration" = "4" + # Normal + register "slow_ppt_limit_mW" = "25000" + register "fast_ppt_limit_mW" = "30000" + register "slow_ppt_time_constant_s" = "5" + register "stapm_time_constant_s" = "275" + register "sustained_power_limit_mW" = "15000" + register "thermctl_limit_degreeC" = "100" + register "vrm_current_limit_mA" = "28000" + register "vrm_maximum_current_limit_mA" = "50000" + register "vrm_soc_current_limit_mA" = "10000" + # Throttle (e.g., Low/No Battery) + register "vrm_current_limit_throttle_mA" = "20000" + register "vrm_maximum_current_limit_throttle_mA" = "20000" + register "vrm_soc_current_limit_throttle_mA" = "10000" end # chip soc/amd/mendocino |