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| author | Shuo Liu <shuo.liu@intel.com> | 2024-06-16 22:36:04 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-23 10:00:15 +0000 |
| commit | 51d74346878a55f0178a737ce1f5c8077cc98a45 (patch) | |
| tree | 8c90bf777dbda9ab240a3b5a58c76aa88426e79a /src/mainboard/google/sarien | |
| parent | 86d09d93a74aa5ce075dacb397cec8ad04082000 (diff) | |
soc/intel/xeon_sp/ibl: Update registers for reach bootable
Change-Id: Id2a2946b7fdfd7fd245835afe6abc9a3f7e1a508
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Co-authored-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/google/sarien')
0 files changed, 0 insertions, 0 deletions