diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2014-05-22 08:25:36 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-04 00:03:54 +0100 |
| commit | 25c6f75bb29fceba7a30d170f2401241fc3428ed (patch) | |
| tree | f05601525d0177b05a915a7243485f4967c28c22 /src/mainboard/google/samus/spd/spd.c | |
| parent | fe8b788a12b225ae45ecb26625cfd2588d193ff3 (diff) | |
samus: Update for board revision 1.9
- Update GPIO map
- Update SPD for new memory and 4-bit table decode
- Enable USB3 port 3 and 4 (shared with PCIe port 1)
- Enable PCIe port 3 and disable port 1
- Enable SerialIO ACPI mode for devices
- Disable S0ix for now to prevent use of C10
- Special handling for memory with broadwell CPU
BUG=chrome-os-partner:28234
TEST=Boot on P1.9
Original-Change-Id: If6adcc2ea76f1af7613b715133483d7661e94dd8
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201083
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 35835eaed3e098597e46f602fbd646cfbb899355)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Icb03808da6d92705bbc411d155c25de57c4409c6
Reviewed-on: http://review.coreboot.org/8007
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/samus/spd/spd.c')
| -rw-r--r-- | src/mainboard/google/samus/spd/spd.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/mainboard/google/samus/spd/spd.c b/src/mainboard/google/samus/spd/spd.c index 331fc6dc0f..0409302fb0 100644 --- a/src/mainboard/google/samus/spd/spd.c +++ b/src/mainboard/google/samus/spd/spd.c @@ -80,7 +80,7 @@ static void mainboard_print_spd_info(uint8_t spd[]) /* Copy SPD data for on-board memory */ void mainboard_fill_spd_data(struct pei_data *pei_data) { - int spd_gpio[3]; + int spd_gpio[4]; int spd_index; int spd_file_len; struct cbfs_file *spd_file; @@ -88,11 +88,14 @@ void mainboard_fill_spd_data(struct pei_data *pei_data) spd_gpio[0] = get_gpio(SPD_GPIO_BIT0); spd_gpio[1] = get_gpio(SPD_GPIO_BIT1); spd_gpio[2] = get_gpio(SPD_GPIO_BIT2); + spd_gpio[3] = get_gpio(SPD_GPIO_BIT3); - spd_index = spd_gpio[2] << 2 | spd_gpio[1] << 1 | spd_gpio[0]; + spd_index = (spd_gpio[3] << 3) | (spd_gpio[2] << 2) | + (spd_gpio[1] << 1) | spd_gpio[0]; - printk(BIOS_DEBUG, "SPD: index %d (GPIO%d=%d GPIO%d=%d GPIO%d=%d)\n", - spd_index, + printk(BIOS_DEBUG, "SPD: index %d (GPIO%d=%d GPIO%d=%d " + "GPIO%d=%d GPIO%d=%d)\n", spd_index, + SPD_GPIO_BIT3, spd_gpio[3], SPD_GPIO_BIT2, spd_gpio[2], SPD_GPIO_BIT1, spd_gpio[1], SPD_GPIO_BIT0, spd_gpio[0]); |