diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-10-04 11:49:29 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2014-08-31 23:53:15 +0200 |
| commit | 598bf954e9050a1bf9cb77e647ca7e9fb44bef44 (patch) | |
| tree | daa6f23a14d88aaff2f8c322bfa29a6916f807c3 /src/mainboard/google/samus/samsung_8Gb.spd.hex | |
| parent | 49ba28339087cb1057fbb12071a0981013a88e55 (diff) | |
samus: Change SPD to indicate LPDDR
There is some magic new SPD SDRAM type 241 to indicate LPDDR.
I cannot find it specificed in any JEDEC document but it is
what the reference code uses.
Change-Id: I21d7a943784435cb336ecdba7ca5eac0bf5fcd92
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/171900
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 0a1385515c62fd1e534b12568df8aaf2170e06f4)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6777
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard/google/samus/samsung_8Gb.spd.hex')
| -rw-r--r-- | src/mainboard/google/samus/samsung_8Gb.spd.hex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/samus/samsung_8Gb.spd.hex b/src/mainboard/google/samus/samsung_8Gb.spd.hex index 0cc843159e..85e2be4f03 100644 --- a/src/mainboard/google/samus/samsung_8Gb.spd.hex +++ b/src/mainboard/google/samus/samsung_8Gb.spd.hex @@ -1,4 +1,4 @@ -92 11 0B 03 04 19 02 0A 03 11 01 08 0A 00 FE 00 +92 11 F1 03 04 19 02 0A 03 11 01 08 0A 00 FE 00 69 78 69 3C 69 11 18 81 F0 0A 3C 3C 01 40 83 01 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0F 11 02 00 |