diff options
author | Duncan Laurie <dlaurie@chromium.org> | 2014-05-22 08:25:36 -0700 |
---|---|---|
committer | Marc Jones <marc.jones@se-eng.com> | 2015-01-04 00:03:54 +0100 |
commit | 25c6f75bb29fceba7a30d170f2401241fc3428ed (patch) | |
tree | f05601525d0177b05a915a7243485f4967c28c22 /src/mainboard/google/samus/mainboard.c | |
parent | fe8b788a12b225ae45ecb26625cfd2588d193ff3 (diff) |
samus: Update for board revision 1.9
- Update GPIO map
- Update SPD for new memory and 4-bit table decode
- Enable USB3 port 3 and 4 (shared with PCIe port 1)
- Enable PCIe port 3 and disable port 1
- Enable SerialIO ACPI mode for devices
- Disable S0ix for now to prevent use of C10
- Special handling for memory with broadwell CPU
BUG=chrome-os-partner:28234
TEST=Boot on P1.9
Original-Change-Id: If6adcc2ea76f1af7613b715133483d7661e94dd8
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/201083
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 35835eaed3e098597e46f602fbd646cfbb899355)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: Icb03808da6d92705bbc411d155c25de57c4409c6
Reviewed-on: http://review.coreboot.org/8007
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/samus/mainboard.c')
-rw-r--r-- | src/mainboard/google/samus/mainboard.c | 66 |
1 files changed, 3 insertions, 63 deletions
diff --git a/src/mainboard/google/samus/mainboard.c b/src/mainboard/google/samus/mainboard.c index fdc7d78769..89303b9017 100644 --- a/src/mainboard/google/samus/mainboard.c +++ b/src/mainboard/google/samus/mainboard.c @@ -33,73 +33,14 @@ #include <arch/interrupt.h> #include <boot/coreboot_tables.h> #include "ec.h" -#include "onboard.h" -static void mainboard_init(device_t dev) +void mainboard_suspend_resume(void) { - mainboard_ec_init(); } -static int mainboard_smbios_data(device_t dev, int *handle, - unsigned long *current) +static void mainboard_init(device_t dev) { - int len = 0; - - len += smbios_write_type41( - current, handle, - BOARD_TRACKPAD_NAME, /* name */ - BOARD_TRACKPAD_IRQ, /* instance */ - BOARD_TRACKPAD_I2C_BUS, /* segment */ - BOARD_TRACKPAD_I2C_ADDR, /* bus */ - BOARD_TRACKPAD_IRQ_TYPE, /* device */ - 0); /* function */ - - len += smbios_write_type41( - current, handle, - BOARD_TOUCHSCREEN_NAME, /* name */ - BOARD_TOUCHSCREEN_IRQ, /* instance */ - BOARD_TOUCHSCREEN_I2C_BUS, /* segment */ - BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */ - BOARD_TOUCHSCREEN_IRQ_TYPE, /* device */ - 0); /* function */ - - len += smbios_write_type41( - current, handle, - BOARD_CODEC_NAME, /* name */ - BOARD_CODEC_IRQ, /* instance */ - BOARD_CODEC_I2C_BUS, /* segment */ - BOARD_CODEC_I2C_ADDR, /* bus */ - BOARD_CODEC_IRQ_TYPE, /* device */ - 0); /* function */ - - len += smbios_write_type41( - current, handle, - BOARD_NFC_NAME, /* name */ - BOARD_NFC_IRQ, /* instance */ - BOARD_NFC_I2C_BUS, /* segment */ - BOARD_NFC_I2C_ADDR, /* bus */ - BOARD_NFC_IRQ_TYPE, /* device */ - 0); /* function */ - - len += smbios_write_type41( - current, handle, - BOARD_ACCEL_NAME, /* name */ - BOARD_ACCEL_IRQ, /* instance */ - BOARD_ACCEL_I2C_BUS, /* segment */ - BOARD_ACCEL_I2C_ADDR, /* bus */ - BOARD_ACCEL_IRQ_TYPE, /* device */ - 0); /* function */ - - len += smbios_write_type41( - current, handle, - BOARD_ACCEL_GYRO_NAME, /* name */ - BOARD_ACCEL_GYRO_IRQ, /* instance */ - BOARD_ACCEL_GYRO_I2C_BUS, /* segment */ - BOARD_ACCEL_GYRO_I2C_ADDR, /* bus */ - BOARD_ACCEL_GYRO_IRQ_TYPE, /* device */ - 0); /* function */ - - return len; + mainboard_ec_init(); } // mainboard_enable is executed as first thing after @@ -108,7 +49,6 @@ static int mainboard_smbios_data(device_t dev, int *handle, static void mainboard_enable(device_t dev) { dev->ops->init = mainboard_init; - dev->ops->get_smbios_data = mainboard_smbios_data; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); } |