diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-21 14:54:45 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:03:31 +0100 |
| commit | 175c636c38b921030022635567c97a33300e3af5 (patch) | |
| tree | 2c807162f3d7fdebebf699b064a67575569189c5 /src/mainboard/google/rush_ryu/bootblock.c | |
| parent | 65c5b9d4310302c327231f8ba2bc54d034b34276 (diff) | |
ryu: use named bus numbers instead of literals
Use the bus number enumerations from funit to make the
pad names and bus numbers consistent and clearer.
BUG=chrome-os-partner:31106
BRANCH=None
TEST=Built and booted to kernel.
Change-Id: If84ed825537f598c033dcacbcba759e0fe4e90ec
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f4375a8e47f572d618044f65603fb9288832f936
Original-Change-Id: I817a56e879ecc96474128d624dc46c12ebc5c7a8
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/213492
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8997
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush_ryu/bootblock.c')
| -rw-r--r-- | src/mainboard/google/rush_ryu/bootblock.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mainboard/google/rush_ryu/bootblock.c b/src/mainboard/google/rush_ryu/bootblock.c index ffcffd3634..52a49a68da 100644 --- a/src/mainboard/google/rush_ryu/bootblock.c +++ b/src/mainboard/google/rush_ryu/bootblock.c @@ -27,7 +27,6 @@ #include <soc/padconfig.h> #include <soc/nvidia/tegra/i2c.h> #include <soc/nvidia/tegra132/clk_rst.h> -#include <soc/nvidia/tegra132/spi.h> /* FIXME: move back to soc code? */ #include "pmic.h" @@ -91,8 +90,6 @@ void bootblock_mainboard_init(void) soc_configure_funits(funits, ARRAY_SIZE(funits)); soc_configure_pads(padcfgs, ARRAY_SIZE(padcfgs)); - i2c_init(4); - pmic_init(4); - - tegra_spi_init(4); + i2c_init(I2CPWR_BUS); + pmic_init(I2CPWR_BUS); } |