diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-28 15:49:31 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:04:35 +0100 |
| commit | d7f26b60bf899668ad5244702140e94e03bd38a1 (patch) | |
| tree | 73a9abd8cff60ebf67d328800576f176993b9544 /src/mainboard/google/rush_ryu/bct/sdram-ryu-4GB-924-Hynix-full.cfg | |
| parent | 19902e9d9bce730ed6cda4f7c934d6c08f783635 (diff) | |
ryu: configure plld for display usage
The kernel doesn't have the logic for bringing up the plld.
Therefore, configure it in the firmware. The clock used
is an interim value until the display controller sequencing
is fully implemented.
BUG=chrome-os-partner:31640
BRANCH=None
TEST=Noted configured freq is close to requested. Also, no
more plld errors observed from the kernel.
Change-Id: I0788c83843699ec7cef52b3a219ebb9b0db9082f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b44956ec87e9083aebe589349cbe168f7f101d8b
Original-Change-Id: I6f57d5c48630385d1814e7ef61898a2d49c8f747
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/214841
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9026
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/mainboard/google/rush_ryu/bct/sdram-ryu-4GB-924-Hynix-full.cfg')
0 files changed, 0 insertions, 0 deletions