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authorAnil Kumar <anil.kumar.k@intel.com>2023-07-10 21:31:29 -0700
committerSubrata Banik <subratabanik@google.com>2023-08-31 09:06:05 +0000
commita637fa931056d734eb67ddbd9a1d8d2f9407302b (patch)
treeba1dbfec735bf2c02704b9130b1e37082373a64a /src/mainboard/google/rex
parent6aca25c887ba9e7cce92e18ab77fc49c352ad12a (diff)
mb/google/rex/var/rex0: Add HDMI GPIOs to early GPIO list
Add HDMI GPIO configuration to early GPIO list to support VGA text o/p in Pre-RAM stage on HDMI. BUG=b:279173035 TEST=If CONFIG_UGOP_EARLY_GRAPHICS is set to y, check SOL text on HDMI during Pre-RAM boot stage. Change-Id: I13691850d09a442d5d5493a2b1dcf1145cf9797a Signed-off-by: Anil Kumar <anil.kumar.k@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/77521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/google/rex')
-rw-r--r--src/mainboard/google/rex/variants/rex0/gpio.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c
index f3c7324c9d..6cd24b7803 100644
--- a/src/mainboard/google/rex/variants/rex0/gpio.c
+++ b/src/mainboard/google/rex/variants/rex0/gpio.c
@@ -376,6 +376,8 @@ static const struct pad_config gpio_table[] = {
/* Early pad configuration in bootblock */
static const struct pad_config early_gpio_table[] = {
+ /* GPP_B16 : [] ==> SOC_HDMI_HPD_L */
+ PAD_CFG_NF(GPP_B16, NONE, DEEP, NF2),
/* GPP_B17 : [] ==> EN_WWAN_PWR */
PAD_CFG_GPO(GPP_B17, 1, DEEP),
/* GPP_B18 : [] ==> SOC_I2C_TPM_SDA */
@@ -391,11 +393,17 @@ static const struct pad_config early_gpio_table[] = {
/* GPP_E07 : [] ==> WWAN_FCPO_L (updated in romstage) */
PAD_CFG_GPO(GPP_E07, 0, DEEP),
+ /* GPP_E14 : [] ==> SOC_EDP_HPD_L */
+ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
/* GPP_H08 : [] ==> UART_DBG_TX_SOC_RX_R */
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
/* GPP_H09 : [] ==> UART_SOC_TX_DBG_RX_R */
PAD_CFG_NF(GPP_H09, NONE, DEEP, NF1),
+ /* GPP_H16 : [] ==> DDIB_HDMI_CTRLCLK*/
+ PAD_CFG_NF(GPP_H16, NONE, DEEP, NF1),
+ /* GPP_H17 : [] ==> DDIB_HDMI_CTRLDATA */
+ PAD_CFG_NF(GPP_H17, NONE, DEEP, NF1),
/* GPP_D03 : [] ==> EN_PP3300_SD */
PAD_CFG_GPO(GPP_D03, 1, DEEP),